Performance Analysis Method under Time-Space Variations

Abstract:

With shrinking process size, many variations have a growing impact on circuit performance for today’s integrated circuit(IC) technologies. In this paper, we describe a high-order model of circuit performance analysis under time-space variations. The time-space variations, such as process variations, place and route imformance, environment parameters and temporal variations, are included in hierarachical perfornance analysis. The time-space variations are increased in variance analysis. Based on quadratic model, coefficients of the K-L expansion and function item are decided. The high-order analysis model is built. The result of experiment proves that the proposed method can improve analysis performance effectively.

• Periodical: Advanced Materials Research (Volume 186)
• Pages: 494-498
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.186.494
• Online since: January 2011
• Authors: Hu Jing
• Keywords: Karhunen-Loeve Expansion, Performance Analysis, Time-Space Variations, VLSI Circuit

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