Design and Simulation on High Speed FFT Processor in Radar Signal Processing

Shun Xin Li; Yu Fan Mo

doi:10.4028/www.scientific.net/AMR.461.333

Paper Titles

Comparison of Earthquake Cases and China Public Safety Early Warning Information
p.311

Key Technology for CBR Maintenance Resources Requirement Analysis
p.316

Study of Intelligent Optimization Methods Applied in the Fractional Fourier Transform
p.323

Mine Accidents and China Colliery Safety Early Warning Information
p.329

Design and Simulation on High Speed FFT Processor in Radar Signal Processing
p.333

Study of the Crack Propagation for Particles Reinforced Composite Materials with Different Inclusion Distribution
p.338

Surface Image Edge Detection Algorithm Based on Grey Relational Analysis
p.343

Bit Error Rate Performance Analysis of OCDMA System
p.347

The Grouting Bored Pile Perfusing Pile Bearing Capacity after Effect Factors of the Finite Element Analysis
p.351

HomeAdvanced Materials ResearchAdvanced Materials Research Vol. 461Design and Simulation on High Speed FFT Processor...

Design and Simulation on High Speed FFT Processor in Radar Signal Processing

Abstract:

Based on the high-speed, real-time and high precision of radar signal processing, FFT arithmetic is utilized in the radar signal processing and FFT processor is designed and implemented. The proposed processor adopts radix-2 FFT algorithm. FFT computing based on FPGA has the advantages of high speed, less resource occupancy, easy algorithm and convenient system debugging and implementation. It is composed employing VHDL as hardware description language, FPGA as the logic controller, Quartus II as designing and synthesis simulation tool. The simulation results indicated FFT processor approached the request of the radar signal processing and it is suitable for the application of high-speed signal processing

You might also be interested in these eBooks

Advanced Building Materials and Structural Engineering

View Preview

Info:

Periodical:

Advanced Materials Research (Volume 461)

Pages:

333-337

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.461.333

Citation:

Cite this paper

Online since:

February 2012

Authors:

Shun Xin Li, Yu Fan Mo

Keywords:

Field-Programmable Gate Array (FPGA), Radar Signal Process, Radix-2 FFT Algorithm, Simulation

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

References

[1] WANG Renping, HE Minghua, ZHANG Yazhen. Design of FFT Processor IC for OFDM. System Microelectronics, 2010, 40(4): 583-587.

Google Scholar

[2] ZHANG Yu, FANG Kang ling. Design of General FFT Processor Based on FPGA. Computer Technology and Development, 2010, 20(8): 87-90, 95.

Google Scholar

[3] SUN Guiling, JI Yongxin. Design and Simulation Research on High Speed and High Precision FFT IP Core. Journal of System Simulation, 2010, 22(8): 2018-(2022).

Google Scholar

[4] WANG Zhendao, WANG Yufeng. High speed FFT butterfly unit and addresses generator optimization. Computer Engineering and Applications. 2010, 46(8): 64-66.

Google Scholar

[5] ZHANG Li, LI Shuangfei. Design and implementation of the FFT parallel processor based on ASIP. Journal of Xidian University, 37(4): 630-635.

Google Scholar

[6] Liu Hongxia, Yang Liang, Huang Jin. Effective Algotithm of Parallel Twiddle Factor Generation for Programmable FFT Processing and Its Implemetation. Journal of Xidian University, 2009, 36(3): 541-546.

Google Scholar

[7] Nash J G. A new class of high performance FFTS/2007 IEEE International Conference on Acoustics. Speech and Signal Processing, Honolulu, 2007, 12(3): 21-23.

DOI: 10.1109/icassp.2007.366162

Google Scholar

[8] Li Z, Shuangfei L. A Research on an ASIP Processing Element Architecture Suitable for FPGA Implementation/IEEE International Conference on Computer Science and Software Engineering, vol 3, Wuhan: IEEE, 2008: 441-445.

DOI: 10.1109/csse.2008.580

Google Scholar