Ring Oscillator Phase Noise Properties due to PSN with Deterministic Frequency

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In this paper, ring oscillator phase noise caused by power supply noise (PSN) with deterministic frequency is analyzed. Results show that phase noise caused by deterministic noise is only an impulse series. Compared with the jitter caused by PSN, the phase noise caused by PSN with deterministic frequency contributes considerably less to total phase noise performance. To verify the analysis method, a CMOS ring oscillator is designed and fabricated using SMIC 0.13 µm CMOS process. Comparisons between the analytical results and measurements prove the accuracy of the proposed method

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527-533

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March 2012

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© 2012 Trans Tech Publications Ltd. All Rights Reserved

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[1] Madoglio, P., Zanuso, M., and Levantino, S., Quantization Effects in All-Digital Phase-Locked Loops, IEEE TCAS-II, No. 12, Dec. 2007, pp.1120-1124.

DOI: 10.1109/tcsii.2007.906171

Google Scholar

[2] T. Olsson and Peter Nilsson, A digitally controlled PLL for SoC application, JSSCC, vol. 39, No. 5, May. 2004, pp.751-759.

Google Scholar

[3] A.M. Fahim, A compact, low-power low-jitter digital PLL, Proc. Eur. Solid-state circuits Conf., Sep. 2003, pp.101-104.

DOI: 10.1109/esscirc.2003.1257082

Google Scholar

[4] F. Herzel and B. Razavi, A Study of Oscillator jitter due to supply and substrate noise, IEEE TCAS-II, vol. 46, Jan. 1999, pp.56-62.

DOI: 10.1109/82.749085

Google Scholar

[5] Asad A. Abidi, Phase Noise and Jitter in CMOS Ring Oscillators, JSSCC, Vol. 41, no. 8, Aug. 2006, pp.1803-1816.

DOI: 10.1109/jssc.2006.876206

Google Scholar

[6] Nathen Barton, Dicle Ozis and Terri Fiez, Analysis of the jitter in ring oscillators due to deterministic noise, IEEE International Symposium On Circuits and Systems, Vol. 4, 2002, pp.393-396.

DOI: 10.1109/iscas.2002.1010474

Google Scholar

[7] F. Herzel and B. Razavi, A Study of Oscillator jitter due to supply and substrate noise, IEEE TCAS-II, Vol. 46, Jan. 1999, pp.56-62.

DOI: 10.1109/82.749085

Google Scholar

[8] Payam Heydari, Analysis of the PLL jitter due to power/ground and substrate noise, IEEE TCAS-I, Vol. 51, No. 12, Dec. 2004, p.2404–2416.

DOI: 10.1109/tcsi.2004.838240

Google Scholar

[9] Elad Alon, Jaeha Kim, Sudhakar Pamarti, etc., Replica Compensated Linear Regulators for Supply-Regulated Phase-Locked Loops, JSSCC, Vol. 41, No. 2, Feb. 2006, pp.413-424.

DOI: 10.1109/jssc.2005.862347

Google Scholar

[10] Abhijith Arakali, Srikanth Gondi and Pavan Kumar Hanumolu, Low-Power Supply-Regulation Techniques for Ring Oscillators in Phase-Locked Loops Using a Split-Tuned Architecture, IEEE Journal of Solid-state Circuits, Vol. 44, No. 8, Aug. 2009, pp.2169-2181.

DOI: 10.1109/jssc.2009.2022916

Google Scholar

[11] Synopsys, Hspice@ RF user guide, Sep. 2006, pp.235-277.

Google Scholar