FPGA Based Implementation of Semi-Fragile Watermarking Algorithm

Abstract:

This paper presents an FPGA implementation of a semi-fragile watermarking-based algorithm for a digital camera. The architecture of digital authentication camera is discussed and a semi-fragile watermarking algorithm based the invariant property of DCT coefficients quantization is designed which can survive a certain amount of compression. The components of a digital camera and the watermarking algorithm are described in Verilog HDL and implemented on the DE2-70 board. The results shown that the hardware implementation can provide real time performance and resist off-line attacks compare with the software-assisted solution.

• Periodical: Advanced Materials Research (Volumes 532-533)
• Pages: 1419-1423
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.532-533.1419
• Online since: June 2012
• Authors: Fang Ming Liu, Xiao Zhong Pan
• Keywords: Digital Camera, Field-Programmable Gate Array (FPGA), Image Authentication, Semi-Fragile Watermarking

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