Design and Implementation of Serial RapidIO Based on DSP and FPGA

Jun Liu; Yan Tian; Wei Hao; Lei Qu

doi:10.4028/www.scientific.net/AMR.971-973.1581

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 971-973Design and Implementation of Serial RapidIO Based...

Design and Implementation of Serial RapidIO Based on DSP and FPGA

Abstract:

In order to meet the request of high-speed data exchange in embedded systems, this paper details the high-speed SRIO (Serial RapidIO) interface protocol and the process of SRIO access timing between the local endpoint devices and the remote endpoint devices. And also we implement the design of the new high-performance RapidIO interconnection between DSP and FPGA. Through the performance testing of SRIO data transmission system, experimental results show that the design can stably transfer data at high speed between processors.

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Periodical:

Advanced Materials Research (Volumes 971-973)

Pages:

1581-1585

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.971-973.1581

Citation:

Cite this paper

Online since:

June 2014

Authors:

Jun Liu*, Yan Tian, Wei Hao, Lei Qu

Keywords:

DSP, Embedded System, FPGA, SRIO

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* - Corresponding Author

References

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