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Rapid Thermal Processing and beyond: Applications in Semiconductor Processing

Materials Science Forum Volumes 573 - 574

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• p181 Production Worthy ALD in Batch Reactors   [ 733 K ]
  Authors: Alexander Gschwandtner
• p197 Ultra Shallow Depth Profiling with SIMS   [ 300 K ]
  Authors: H. Ulrich Ehrke
• p207 Implant Annealing – An Evolution from Soak over Spike to Millisecond Annealing   [ 938 K ]
  Authors: Silke Paul, Wilfried Lerch
• p229 A Light-Induced Annealing of Silicon Implanted Layers   [ 260 K ]
  Authors: Bo Lojek
• p237 Laser Annealing of Implanted Semiconductor Layers – One Bridge to Nano-Processing   [ 1 M ]
  Authors: Hans D. Geiler
• p257 An Overview of ms Annealing for Deep Sub-Micron Activation   [ 402 K ]
  Authors: Jeffrey C. Gelpey, Steve McCoy, Dave Camm, Wilfried Lerch
• p269 Extended Defects Evolution in Pre-Amorphised Silicon after Millisecond Flash Anneals   [ 1 M ]
  Authors: Fuccio Cristiano, El Mehdi Bazizi, Pier Francesco Fazzini, Simona Boninelli, Ray Duffy, Ardechir Pakfar, Silke Paul, Wilfried Lerch
• p279 Modeling and Simulation of Advanced Annealing Processes   [ 2 M ]
  Authors: Alberto Martinez-Limia, Peter Pichler, Christian Steen, Silke Paul, Wilfried Lerch
• p295 Vacancy Engineering – An Ultra-Low Thermal Budget Method for High-Concentration 'Diffusionless' Implantation Doping   [ 335 K ]
  Authors: Nicholas E.B. Cowern, Andrew J. Smith, Nicholas S. Bennett, Brian J. Sealy, Russell Gwilliam, Roger P. Webb, Benjamin Colombeau, Silke Paul, Wilfried Lerch, Ardechir Pakfar
• p305 Ultra-Shallow Junction Formation Using Rapid Thermal Processing   [ 511 K ]
  Authors: Amitabh Jain
• p319 Ultra-Rapid Thermal Process for ULSIs   [ 2 M ]
  Authors: Kyoichi Suguro
• p325 Advanced Millisecond Annealing Technologies and its Applications and Concerns on Advanced Logic LSI Fabrication Processes   [ 523 K ]
  Authors: Masataka Kase, Tomonari Yamamoto, Tomohiro Kubo
• p333 Doping Strategies for FinFETs   [ 2 M ]
  Authors: Bartek J. Pawlak, Ray Duffy, An De Keersgieter
• p341 RTP Requirements for CMOS Integration of Dual Work Function Phase Controlled Ni-FUSI (Fully Silicided) Gates with Simultaneous Silicidation of nMOS (NiSi) and pMOS (Ni-Rich Silicide) Gates on HfSiON   [ 1 M ]
  Authors: Anne Lauwers, Jorge Kittl, Karen Maex
• p355 A Short History of Pattern Effects in Thermal Processing   [ 548 K ]
  Authors: Paul J. Timans