Papers by Author: A. Claverie

Abstract: We have designed a set of experiments in which a controlled supersaturation of vacancies can be maintained constant during annealing of a boron implant. In presence of voids, a remarkable reduction of boron diffusivity is observed and, for low fluence B implantation, TED can be totally suppressed. We show that the presence of nanovoids in the B implanted region is not a prerequisite condition for the reduction of B diffusivity. Large voids located at more than 100 nm apart from the B profile still show the same effect. Small voids can also be used to increase the activation of boron. All these results are consistent with the hypothesis that, during annealing, vacancies are injected from the voids region towards the Is rich region in the implanted region where they massively recombine. Finally, we show that BICs cannot be simply dissolved by injecting vacancies into the region where they stand.

Abstract: Nanocrystal memories are attractive candidate for the development of non volatile memory devices for deep submicron technologies. In a nanocrystal memory device, a 2D network of isolated nanocrystals is buried in the gate dielectric of a MOS and replaces the classical polysilicon layer used in floating gate (flash) memories. Recently, we have demonstrated a route to fabricate these devices at low cost by using ultra low energy ion implantation. Obviously, all the electrical characteristics of the device depend on the characteristics of the nanocrystal population (sizes and densities) but also on their exact location with respect to the gate and channel of the MOS transistor. It is the goal of this paper to report on the main materials science aspects of the fabrication of 2D arrays of Si nanocrystals in thin SiO2 layers and at tunable distances from their SiO2/interfaces.

Abstract: In this work, we present a detailed structural characterization of the defects formed after 0.5 keV B+ implantation into Si to a dose of 1x1015 ions/cm2 and annealed at 650°C and 750°C during different times up to 160 s. The clusters were characterized by making use of Weak Beam and High Resolution Transmission Electron Microscopy (HRTEM) imaging. They are found to be platelets of several nanometer size with (001) habit plane. Conventional TEM procedure based on defect contrast behavior was applied to determine the directions of their Burger’s vectors. Geometric Phase Analysis of HRTEM images was used to measure the displacement field around these objects and, thus, to unambiguously determine their Burger’s vectors. Finally five types of dislocation loops lying on (001) plane are marked out: with ] 001 [1/3 ≅ b and b ∝ [1 0 1], [-1 0 1], [0 1 1], [0 -1 1].

Abstract: In this paper, we have studied the evolution of quantum electronic features with the size of silicon nanoparticles embedded in an ultra-thin SiO2 layer. These nanoparticles were synthesized by ultralow energy (1 KeV) ion implantation and annealing. Their size was modified using the effect of annealing under slightly oxidizing ambient (N2+O2). Material characterization techniques including transmission electron microscopy (TEM) Fresnel imaging and spatially resolved electron energy loss spectroscopy (EELS) have been used to evaluate the effects of oxidation on structural characteristics of nanocrystal layer. Electrical transport characteristics have been measured on few (less than two hundred) nanoparticles by exploiting a nanoscale MOS capacitor as a probe. Top electrode of this nanoscale capacitor (100 nm x 100 nm) was patterned over the samples by electron-beam nanolithography. Room temperature I-V and I-t characteristics of these structures exhibit discrete current peaks which have been interpreted by quantized charging of the nanoparticles and electrostatic interaction between the trapped charges and the tunneling current. The effects of progressive oxidation on these current features have been studied and discussed.

Abstract: In this paper, we present a study on the contribution of silicon nanocrystals to the electrical transport characteristics of large (100 m x 100 m) and small (100 nm x 100 nm) metaloxide- semiconductor (MOS) capacitors at room temperature. A layer of silicon nanocrystals is synthesized within the oxide of these capacitors by ultra-low energy ion implantation and annealing. Several features including negative differential resistance (NDR), sharp current peaks and random telegraph signal (RTS) are demonstrated in the current-voltage and current-time characteristics of these capacitors. These features have been associated to charge storage in silicon nanocrystals and to the resulting Coulomb interaction between the stored charges and the tunneling current. Clear transition from a continuous response of large capacitors to a discrete response of small capacitors reveals the quantized nature of the charge storage phenomenon in these nanocrystalline dots. The effect of the nanocrystal density from nearly continuous layer to isolated nanodots is also presented.