Papers by Author: Alton B. Horsfall

Abstract: This paper reports on direct frequency modulation of a RF Colpitts oscillator, realised from silicon carbide devices and proprietary components, capable of transmitting sensor data whilst operating at 300°C. Utilizing a reversed biased Schottky diode as a varactor in an LC oscillator, it is possible to modulate the frequency of an RF carrier by applying external voltage signals. These experiments have shown that a 10V bias will increase the frequency by as much as 10%, however signals as low as 10mV are easily detectable with standard silicon receivers.

Abstract: The recent development of silicon carbide complimentary metal-oxide-semiconductor (CMOS) is a key enabling step in the realisation of low power circuitry for high temperature applications, such as aerospace and well logging. This paper describes investigations into the properties of the gate dielectric as part of the development of the technology to realize monolithic fabrication of both n and p channel devices. A comparison of the oxide quality of the silicon carbide CMOS transistors is performed to examine the feasibility of this technology for high temperature circuitry.

Abstract: In this work a Pt/HfO₂/SiO₂/SiC MIS capacitor is exposed in air at 400°C for 1000 hours, with its oxide capacitance, flatband voltage and density of interface traps being measured at various time intervals. After the structure has been shown to operate reliably for extensive periods of time at 400°C, the C-V characteristics of a device from the same fabrication batch are measured at 300°C in different concentrations of H2 and examined for sensitivity. The results demonstrate that gas sensitive MIS capacitors incorporating high-ĸ dielectrics, have the potential to operate at extreme temperatures for long periods of time. This makes them suitable for deployment in hostile conditions, where regular servicing may not be possible.

Abstract: In the last decade, or so, many prototype Silicon Carbide devices and circuits have been demonstrated which have surpassed the performance of Silicon for the ability to function in extreme environments. However, the commercialisation of SiC technology now demands high performance and energy efficient miniaturised devices and circuits which can operate on the limited power resources available in harsh and hot hostile environments. This leads to refining, experimenting and perhaps re-designing devices which can rightly claim their share in the current Si dominant market. Consequently, there is a need for accurate simulation models for device engineers to understand device behaviour, examine performance trade-offs and verify the manufacturability of the design. This paper reports the first comprehensive study on the development and validation of high temperature 4H-SiC Technology Computer Aided Design (TCAD) Finite Element simulation model for low power applications. The model is based on 4H-SiC physical and material properties and is validated by high temperature 4H-SiC lateral JFET data, fabricated and characterised by our group at Newcastle University.

Abstract: Epitaxial graphene produced from SiC substrates exhibits a carrier mobility re- duction thought to arise from intercalated silicon. We present the results of density functional simulations and show that individual silicon atoms are highly mobile on and between graphene sheets, suggesting that thermally stable structures involving individual Si impurities are likely to result from the interaction of silicon with defects in the graphene sheets.

Abstract: Trenched implanted vertical JFETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.

Abstract: 3.3 kV rated 4H-SiC diodes with nickel monosilicide Schottky contacts and 2-zone JTE regions were fabricated on commercial epitaxial wafers having a 34 m thick blocking layer with donor concentration of 2.2×1015 cm-3. The diodes were fabricated with and without additional field stop rings to investigate the impact of practically realizable stopper rings on the diode blocking characteristics. The field stop ring was formed by reactive ion etching of heavily doped epitaxial capping layer. The diodes with field stop rings demonstrated significantly higher yield and reduction of reverse leakage current. The diodes demonstrated blocking voltages in excess of 4.0 kV and very low change of leakage current at ambient temperatures up to 200 °C.

Abstract: Detectors capable of withstanding high radiation environments for prolonged periods of exposure are essential for the monitoring of nuclear power stations and nuclear waste as well as for space exploration. Schottky diode X-ray detectors were exposed to high dose proton irradiation (1013 cm-2, 50 MeV) and changes in the detection resolution (spectroscopic full width half-maximum) have been observed. Using Deep Level Transient Spectroscopy (DLTS) and the degradation of the electrical characteristics of the diode, we have shown that radiation induced traps located in the upper half of the bandgap have reduced the concentration of carriers.

Abstract: In this paper we demonstrate the recovery of Ohmic contacts formed on C-face 4H-SiC following high temperature post-processing. After a typical high-κ dielectric anneal in O2 for 3 minutes at 650 °C, replacing the metallization stack is revealed to significantly reduce the damage produced in the I-V characteristics. Using C-AFM we have also studied the mechanisms responsible for Ohmic contact formation, presenting a possible relationship between changes in the SiC crystal orientation and the establishment of Ohmic behaviour.

Abstract: The variation in device process parameters is a core issue in the realisation of complex SiC logic for extreme environments. Factorial design was used to study the effect of variation in four key process parameters on the threshold voltage of an n-channel lateral JFET. Each parameter is simultaneously varied by +/-10% from the default value and the individual and combined effects were calculated at 300, 600 and 1000K. Consequently, we show how these variations in device parameters degrade the threshold voltage, VI, and, hence, the noise margin of logic inverter.