Papers by Author: Dietrich Stephani

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Abstract: We have carefully investigated a number of more than 120 selected chips fabricated on one wafer, by I-V measurements at two different precisely controlled temperatures and precision CV measurements at room temperature. From these measurements the net-doping concentration, the C-V (flat-band) barrier ΦCV, the ideality n, the apparent Richardson constant Aapp and the apparent I-V barrier Φapp have been extracted for each chip. An extremely unique C-V barrier was determined showing a relative standard deviation (sigma over mean) of only 0.086%. Moreover, the average ideality n was found to be as low as 1.028 exhibiting a relative standard deviation of only 0.35%. A clear linear correlation (ρ2 = 0.968) between ideality n and apparent I-V barrier was observed. The effective Richardson constant A** of 4H-SiC in 〈0001〉 directions could therefore be extracted to be most likely in the interval 70 Acm-2K-2 < A** < 80 Acm-2K-2.
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Abstract: SiC power MOSFETs are attractive electronic power switches for innovative power supply and motor drive solutions. The paper discusses this statement and specifies market segments offering the best chances for a commercialization. Due to well-known difficulties in achieving adequate channel conductivity, a lot of SiC-MOSFET publications focus on the channel mobility. However, for a power MOSFET this is only one important parameter affecting the performance. Other characteristics have to be considered too for an honest evaluation: transfer characteristics and blocking capability over the standard operation temperature range, handling of gate oxide stress and related reliability issues, capability of paralleling, dynamic stability, body diode characteristics, reproducibility of the fabrication process and device size. Various attempts have been made in recent years in order to address these features. Approaches differ in the use of different crystal orientations and polytypes, accumulation or inversion channel, implanted or epitaxially grown channels and novel oxidation techniques. Worldwide a trend to the planar DIMOS concept can be observed. Our present results are shown for a power SiC MOSFET designed for 10 A / 1200 V. Key data are a specific on-resistance of 12 m1cm2, the desired low but positive increase of the onresistance with temperature, static avalanche (20 mA DC @1574 V), short-circuit stability at 600 V for 20 9s and robust switching behavior.
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Abstract: Large area 4H-SiC PIN diodes have been fabricated which exhibit a stable avalanche ranging between 4.5 and 5.5 kV. The avalanche occurs at an electrical field strength of 2.1 MV/cm at the pn junction. The temperature coefficient of the avalanche is positive (0.3 V/K). The avalanche is tested in DC mode. The device concept as well as the fabrication process is described in detail. Static and dynamic characteristics are shown.
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