Papers by Author: Hiromichi Ohashi

Abstract: A novel dicing technology that utilizes femtosecond pulsed lasers (FSPLs) are demonstrated as a high-speed and cost-effective dicing process for SiC wafers. The developed dicing process consists of cleavage groove formation on a SiC wafer surface by the FSPL, followed by chip separation by pressing a cleavage blade. The effective FSPL scan speed on the SiC surfaces was 33 mm/s. Kerf loss can be negligible in the developed FSPL dicing process. In addition, the residual lattice strain in the FSPL-diced SiC chips was comparably small to that of the conventional mechanical process using diamond saws, due to the absence of the lattice heating effect in femtosecond-laser processes.

Abstract: It is strongly desired to operate SiC power devices at higher junction temperatures (Tj), but that often entails problems because they contain a variety of materials with thermal activity or weakness. An example of such troubles is the steep increase in resistance of the Al electrode in the source (or emitter) contact holes, caused by electromigration (EM). In this work, EM reliability of the contact hole in SiC power devices was evaluated for an improved Al electrode sandwiched between thin TaN layers. An estimated mean time to failure (MTTF) of approximately 3400 years was achieved under conditions of Tj = 300°C and J = 104 A/cm2.

Abstract: Previous simulation works and experiments on the loss of 4H-SiC floating junction Schottky barrier diodes (Super-SBDs) show that the loss is related to the doping concentration in the drift region and the pattern of the floating layer. The effect of the doping concentration for lowering the loss is characterized the breakdown voltage (Vbd) and the on-state resistances (RonS) of the Super-SBDs based on Baliga’s figure of Merit (BFOM). Experimental devices with two doping concentrations in the drift region are fabricated to investigate the static characteristics: Vbd and RonS. The Vbd of the Super-SBDs is close to the simulation result, near 3000 V. However the tendency of the Vbd by the doping concentration is not similar to the simulation result. And the RonS are about 3.22 mcm2 which is higher than that of simulation result. The doping concentration optimized in this study does not show significant lowering loss and the design of the floating layer in the termination region affect the low-loss static characteristics of the Super-SBD. In addition, adopting PiN structure with floating layer (Super-PiN) affects the low-loss dynamic characteristics, optimizing the doping concentration in the drift region. We conclude that the fabricated Super-SBDs with the floating layer in the termination region, the drift region with a doping concentration of 1.01016 cm-3 and mesa-shaped termination structure, have excellent Vbd of 2990 V which is almost same as that of simulation result and RonS of 3.22 mcm2.

Abstract: The C(000-1) face of 4H-SiC has a lot of advantages for the power device fabrication such as the highest oxidation ratio and a smooth surface. However, the DMOS type power MOSFETs on the C(000-1) face have not been realized because of the difficulty of epitaxial growth and of high quality MOS interface formation. We have systematically investigated the device fabrication techniques for power MOSFETs on the C(000-1) face, and succeeded with the IEMOS which have blocking voltage of 660V and an on-resistance of 1.8mΩcm2 and excellent dynamic characteristics.

Abstract: The calculation for 4H-SiC floating junction Schottky barrier diodes (Super-SBDs) was carried out by device simulation and the optimized device structure was fabricated. The best characteristics of the Super-SBDs were breakdown voltage of 2700V and the specific on-resistance of 2.57m*cm2. The world record of Bariga’s Figure of Merit (BFOM) for SiC-SBD expressed by 4Vbd 2/Ron was improved to 11,354MW/cm2.

Abstract: A passivation annealing in nitric oxide (NO) ambient significantly reduces the interfacial defects of the SiO2/4H-SiC interface and improves the inversion MOS channel mobility. Effects of the nitridation in NO ambient become more pronounced at high temperatures in general. However, the maximum process temperature in a standard hot-wall oxidation furnace is restricted around 1200oC due to the softening point of quartz. Meanwhile, by use of a cold-wall oxidation furnace, high temperature and short time thermal processes become possible. In this study, we have developed an extremely high temperature (>1400oC) rapid thermal processing for the gate oxidation in the 4H-SiC DIMOSFET fabrication process. The peak MOS channel mobility of lateral MOSFETs on the DIMOSFET chip shows as high as 19cm2/Vs. The specific on-resistance of the device was 12.5m
cm2 and the blocking voltage was 950V with gate shorted to the source.

Abstract: 4H-SiC floating junction Schottky barrier diodes (Super-SBDs) were fabricated. It was found that their properties are closest to the theoretical limitation, defined by the relationship between specific on-state resistance and breakdown voltage of 4H SiC-unipolar devices. They have a p-type floating layer designed as line-and-spacing. The specific on-state resistances of Super-SBDs with a few micrometers of spacing width were found to be nearly equal to those of conventional SBDs without p-type floating layer. The breakdown voltages of Super-SBDs were higher than those of conventional SBDs. Accordingly the properties of Super-SBDs have improved the trade-off between specific on-state resistance and breakdown voltage, and the highest value to date for Baliga’s Figure of Merit (BFOM) has been obtained.