Authors: Yogesh K. Sharma, A.C. Ahyi, Tamara Issacs-Smith, M.R. Jennings, S.M. Thomas, Philip Andrew Mawby, Sarit Dhar, John R. Williams
Abstract: The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2 eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.
139
Authors: Alberto F. Basile, Sarit Dhar, John R. Williams, Leonard C. Feldman, Patricia M. Mooney
Abstract: Temperature dependent capacitance-voltage (C-V) and constant capacitance transient spectroscopy (CCDLTS) measurements have been performed to investigate the role of N in improving the transport properties of 4H-SiC MOS transistors. The higher channel mobility in the N pre-implanted transistors is due at least in part to activation of a small fraction of the implanted N near the SiO2/SiC interface as donors in SiC during oxidation, thus reducing the effects of interface trapping. In addition, the absence of oxidation-induced near-interface defects, which were observed in NO-annealed capacitors, may contribute to the improved mobility in N pre-implanted transistors.
717
Authors: Sarit Dhar, Ayayi Claude Ahyi, John R. Williams, Sei Hyung Ryu, Anant K. Agarwal
Abstract: Hall measurements on NO annealed 4H-SiC MOS gated Hall bars are reported in the temperature range 77 K- 423 K. The results indicate higher carrier concentration and lower trapping at increased temperatures, with a clear strong inversion regime at all temperatures. In stark contrast to Si, the Hall mobility increases with temperature for 77 K-373K, above which the mobility decreases slightly. The maximum experimental mobility was found to be ~50 cm2 V-1 s-1 which is only about 10% of the 4H-SiC bulk mobility indicating that while NO annealing drastically improves trapping, it does not improve the mobility significantly. Supporting modeling results strongly suggest the presence of a disordered SiC channel region.
713
Authors: Yogesh K. Sharma, Ayayi Claude Ahyi, Tamara Issacs-Smith, Xiao Shen, Sokrates T. Pantelides, Xing Guang Zhu, John Rozen, Leonard C. Feldman, John R. Williams, Yi Xu, Eric Garfunkel
Abstract: Phosphorous passivation of the SiO2/4H-SiC interface lowers the interface trap density and increases the field effect mobility for n-channel MOSFETs to twice the value of 30-40cm2/V-s obtained using standard NO nitridation. Passivation using P2O5 introduced with an SiP2O7 planar diffusion source (PDS) converts the oxide layer to phosphosilicate glass (PSG) which is a polar material. BTS (bias‐temperature‐stress) measurements with MOS capacitors and FETs show that the benefits of reduced interface trap density and increased mobility are offset by unstable flat band and threshold voltages. This instability can be removed by etching away the PSG oxide and depositing a replacement SiO2 layer. However, trap densities for etched MOS capacitors are "NO-like" (i.e., higher), which would lead one to expect a lower mobility if MOSFETs are fabricated with the PSG / etch / deposited oxide process.
743
Authors: John Rozen, Xing Guang Zhu, Ayayi Claude Ahyi, John R. Williams, Leonard C. Feldman
Abstract: We report on the benefits and the shortcomings of the NO annealing process following observations made on capacitors and transistors with various nitrogen densities at the SiO2/SiC interface. While NO annealing leads to a progressively lower interface state density and higher inversion mobility, consistent with Coulomb-limited transport, MOSFET properties are still limited by the relatively poor interface quality. Moreover, NO induces a large amount of hole traps in the oxide. We establish that these properties are not related to the oxidation rate and we discuss them in terms of the nitrogen content.
693
Authors: Alberto F. Basile, John Rozen, X.D. Chen, Sarit Dhar, John R. Williams, Leonard C. Feldman, Patricia M. Mooney
Abstract: The electrical properties of the SiC/SiO2 interface resulting from oxidation of the n-type 6H-SiC polytype were studied by hi-lo CV, temperature dependent CV and constant capacitance deep level transient spectroscopy (CCDLTS) techniques. Several trap species differing in energy and capture cross section were identified. A trap distribution at 0.5 eV below the 6H-SiC conduction band energy and a shallower density of states in both the 6H and 4H polytyes are passivated by post-oxidation NO annealing. However, other ultra-shallow and deeper defect distributions remain after nitridation. The latter may originate from semiconductor traps.
499
Authors: Gil Yong Chung, Mark J. Loboda, M.J. Marninella, D.K. Schroder, Tamara Isaacs-Smith, John R. Williams
Abstract: The pulsed MOS-C (Metal Oxide Semiconductor-Capacitor) technique was used to measure generation lifetimes in 4H-SiC epitaxial wafers. The ratio of generation to recombination lifetime has been investigated to understand the dominant defect for generation lifetime. The EH6/7 defect level is considered to limit generation lifetime and field enhanced emission is proposed to explain extremely large variation of generation lifetime in a small area. Generation lifetime is limited by dislocations when they are above a threshold density of about 106cm-2. Generation lifetimes measured on 4 and 8 degree off-cut angle epi-substrates are very comparable.
283
Authors: John Rozen, Sarit Dhar, San Wu Wang, Valeri V. Afanas'ev, Sokrates T. Pantelides, John R. Williams, Leonard C. Feldman
Abstract: We report on the effect of nitridation on the negative and positive charge buildup in SiC
gate oxides during carrier injection. We observe that the incorporation of nitrogen at the SiO2/SiC
interface can enhance the reliability of the interface by suppressing the generation of interface states
upon electron injection but that it can also degrade the oxide by creating additional hole traps. We
relate these phenomena to the passivation of atomic-level defects by nitrogen.
803
Authors: Ruby N. Ghosh, Reza Loloee, Tamara Isaacs-Smith, John R. Williams
Abstract: The operation of metal-oxide-semiconductor (MOS) devices based on the semiconductor SiC in
high temperature environments above 300 °C requires an understanding of the physical processes in
these capacitor structures under operating conditions. In this study we have focused on the regime
of inversion biasing, where the electrical characteristics of the device are dominated by minority
carriers. We report on the direct observation of the high frequency inversion capacitance due to
thermal generation of holes in 6H-SiC n-MOS capacitors between 450 and 600 °C by monitoring
the 1MHz C-V characteristics of large area, 1000 μm diameter, capacitors in the dark. Our
experimental results are consistent with a first order calculation based on the delta depletion
approximation.
739
Authors: S. Dhar, S.R. Wang, Ayayi Claude Ahyi, Tamara Isaacs-Smith, Sokrates T. Pantelides, John R. Williams, Leonard C. Feldman
Abstract: Post-oxidation anneals that introduce nitrogen at the SiO2/4H-SiC interface have been
most effective in reducing the large interface trap density near the 4H-SiC conduction band-edge
for (0001) Si face 4H-SiC. Herein, we report the effect of nitridation on interfaces created on the
(11 20) a-face and the (0001) C-face of 4H-SiC. Significant reductions in trap density (from >1013
cm-2 eV-1 to ~ 1012 cm-2 eV-1 at EC-E ~0.1 eV) were observed for these different interfaces,
indicating the presence of substantial nitrogen susceptible defects for all crystal faces. Annealing
nitridated interfaces in hydrogen results in a further reduction of trap density (from ~1012 cm-2 eV-1
to ~5 x 1011 cm-2 eV-1 at EC-E ~0.1 eV). Using sequential anneals in NO and H2, maximum field
effect mobilities of ~55 cm-2 V-1s-1 and ~100 cm-2 V-1s-1 have been obtained for lateral MOSFETs
fabricated on the (0001) and (11 20) faces, respectively. These electronic measurements have been
correlated to the interface chemical composition.
949