Papers by Author: L.M. Porter

Abstract: In this study, we performed a statistical analysis of 500 Ni Schottky diodes distributed across a 2-inch, n-type 4H-SiC wafer with an epilayer grown by chemical vapor deposition. A majority of the diodes displayed ideal thermionic emission when under forward bias, whereas some diodes showed ‘double-barrier’ characteristics with a ‘knee’ in the low-voltage log I vs. V plot. X-ray topography (XRT) and polarized light microscopy (PLM) revealed no correlations between screw dislocations and micropipes and the presence of double-barrier diodes. Depth resolved cathodoluminescence (DRCLS) indicated that certain deep-level states are associated with the observed electrical variations.

Abstract: We have used depth-resolved cathodoluminescence spectroscopy (DRCLS) to correlate subsurface deep level emissions and double barrier current-voltage (I-V) characteristics across an array of Ni/4H-SiC diodes on the same epitaxial wafer. These results demonstrate not only a correspondence between these optical features and measured barrier heights, but they also suggest that such states may limit the range of SB heights in general. DRCLS of near-ideal diodes show a broad 2.45 eV emission at common to all diode areas and associated with either impurities or inclusions. Strongly non-ideal diodes exhibit additional defect emissions at 2.2 and 2.65 eV. On the other hand, there is no correlation between the appearance of morphological defects observed by polarized light microscopy or X-ray topography and the presence of double barrier characteristics. The DRCLS observations of defect level transitions that correlate with non-ideal Schottky barriers suggest that these sub-surface defect features can be used to predict Schottky barrier behavior.

Abstract: Silicon has been the semiconductor of choice for microelectronics largely because of the unique properties of its native oxide (SiO2) and the Si/SiO2 interface. For high-temperature and/or high-power applications, however, one needs a semiconductor with a wider energy gap and higher thermal conductivity. Silicon carbide has the right properties and the same native oxide as Si. However, in the late 1990’s it was found that the SiC/SiO2 interface had high interface trap densities, resulting in poor electron mobilities. Annealing in hydrogen, which is key to the quality of Si/SiO2 interfaces, proved ineffective. This paper presents a synthesis of theoretical and experimental work by the authors in the last six years and parallel work in the literature. High-quality SiC/SiO2 interfaces were achieved by annealing in NO gas and monatomic H. The key elements that lead to highquality Si/SiO2 interfaces and low-quality SiC/SiO2 interfaces are identified and the role of N and H treatments is described. More specifically, optimal Si and SiC surfaces for oxidation are identified and the atomic-scale processes of oxidation and resulting interface defects are described. In the case of SiC, we conclude that excess carbon at the SiC/SiO2 interface leads to a bonded Si-C-O interlayer with a mix of fourfold- and threefold-coordinated C and Si atoms. The threefold coordinated atoms are responsible for the high interface trap density and can be eliminated either by H-passivation or replacement by N. Residual Si-Si bonds, which are partially passivated by H and N remain the main limitation. Perspectives for the future for both Si- and SiC-based MOSFETs are discussed.