Papers by Author: Oleg Kononchuk

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Abstract: Structures of Si(001) hydrofillic bonded wafers have been studied by transmission electron microscopy. Model of three-fold nods generation during interaction of intersecting mixed and screw dislocations has been suggested and applied to analyze geometrical features of dislocation networks. Possible mechanisms of dislocation generation at the interface between Si bonded wafers are discussed.
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Abstract: The investigation of regular dislocation networks (DN) formed by direct wafer bonding suggests that the D1 and D2 peaks of dislocation-related luminescence (DRL) in silicon is linked to screw dislocations, whereas edge dislocations are responsible for D3 and D4 DRL peaks. Non-radiative recombination activity in DN could be attributed to edge dislocations and could be related to enhanced ability of these dislocations to getter impurity atoms. Obtained relation of DRL intensity with the density of screw dislocations suggests existence of the optimum twist angle for the wafer-bonding geometry for which the DRL intensity has a maximum. The dependence of DRL intensity on the spacing between screw dislocations has the maximum at about 7 nm. Reported radiative and non-radiative recombination properties of DN present substantial interest not only for possible LED applications in all-Si photonics but also for photovoltaics, since DNs represent a model system for grain boundaries controlling carrier lifetime in microcrystalline-Si material.
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Abstract: PL spectra of SOI wafers with buried oxide (BOX) layer were measured after dissolution annealing at 1200°. Depending on mutual orientation of starting base and top wafers different patterns of luminescence bands were observed after annealing. While the small fraction of luminescence clearly originated from dislocation related centers, another intensive band appeared in the range 0.8 – 0.95eV with certain dependence of maximum position on the twist misorientation. TEM investigation confirmed the existence of dislocation net at the interface. On the other hand some peculiarities of PL spectra did not support their relation to dislocations. Though a stepped chemical etch of surface layer confirmed the origin of new band being at the interface too. Therefore a nature of possible defects generated due to dissolution of BOX layer is discussed.
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Abstract: The results of experimental investigations of the dislocation-related DLTS-peaks originated from the dislocation networks (DN) are presented. Samples with DNs were produced by direct bonding of p-type silicon wafers and no enhancement of oxygen concentration was detected near the DN plane. Origins of the DLTS peaks were proposed and a correlation with the dislocation-related photoluminescence data was established based on known dislocation structure of the samples. Two types of shallow DLTS peaks exhibited Pool-Frenkel effect, which could be linked to the dislocation deformation potential. One of the shallow DLTS peaks was related to straight parts of screw dislocations and another - to the intersections of the dislocations.
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Abstract: High temperature annealing of SOI wafers in non-oxidized ambient leads to internal Buried Oxide (BOX) dissolution. The underlying mechanisms and kinetics of this effect are discussed. High quality SOI wafers with very thin BOX down to 2nm are demonstrated utilizing optimized annealing conditions. Hybrid SOI/bulk wafers are obtained by the new process applying silicon nitride mask on the wafer surface. Stability of SOI and Si3N4/SOI systems at high temperatures is discussed and optimized process window is determined.
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Abstract: High temperature anneal of SOI wafers in oxygen-free atmosphere results in internal buried oxide dissolution and top Si layer etching. Dissolution rate is determined by interstitial oxygen diffusion through the top Si layer and evaporation from the top Si surface in the form of SiO. It has been observed that kinetics of the process follows linear-parabolic law. Simple thermodynamic model is proposed, which explains observed dependences on temperature and top Si layer thickness.
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