Papers by Author: Rick D. Gamble

Abstract: A new chemical mechanical polishing process (ACMP) has been developed by the Penn State University Electro-Optics Center for producing damage free surfaces on silicon carbide substrates. This process is applicable to the silicon face of semi-insulating, conductive, 4H, 6H, onaxis and off-axis substrates. The process has been optimized to eliminate polishing induced selectivity and to obtain material removal rates in excess of 150nm/hour. The wafer surfaces and resultant subsurface damage generated by the process were evaluated by white light interferometery, Transmission Electron Microscopy (TEM), Atomic Force Microscopy (AFM), and epitaxial layer growth. Residual surface damage induced by the polishing process that propagates into the epitaxial layer has been significantly reduced. Total dislocation densities measured on the ACMP processed wafers are on the order of the densities reported for the best as grown silicon carbide crystals [1]. Characterization of high electron mobility transistors (HEMTs) grown on these substrates indicates that the electrical performance of the substrates met or exceeded current requirements [2].

Abstract: Semi-insulating silicon carbide (SiC) wafers are important as substrates for high frequency devices such as AlGaN-GaN HEMT’s. A nondestructive characterization technique has been developed to measure the dielectric properties of SiC wafers in the GHz frequency range where the devices will operate in order to validate wafers for high yield working devices. The dielectric loss is measured at approximately 16 GHz in a split microwave cavity. Initial results show a correlation where the dielectric loss decreases as the resistivity increases, where the resistivity was measured using a Contactless Resistivity Mapping system (COREMA). The uniformity of dielectric loss across SiC wafers was evaluated using a split post dielectric resonator cavity fixed at 5.5GHz to measure the dielectric loss at five points on a wafer. Dielectric loss as a function of temperature from room temperature to 400°C was also studied.

Abstract: For undoped 6H-SiC boules grown by physical vapor transport the variations of resistivity, of the type and density of deep electron and hole traps, and of the concentration of nitrogen and boron were studied as a function of position in the cross section normal to the growth axis and along the growth direction. It was observed that the concentrations of all deep electron and hole traps decreased when moving from seed to tail of the boule and from the center to the edge of the wafers. Modeling of the growth process suggests that the C/Si ratio increases in a similar fashion and could be responsible for observed changes. We also discuss the implications of such stoichiometry changes on compensation mechanisms rendering the crystals semi-insulating and on electrical uniformity of SI-SiC wafers.

Abstract: The effects of growth conditions, diffusion barrier coatings, and hot zone materials on B incorporation in 6H-SiC crystals grown by physical vapor transport (PVT) were evaluated. Development of high purity source material with a B concentration less than 1.8x1015 atoms/cm3, was critical to the growth of boules with a B concentration less than 3.0x1016 atoms/cm3. Application of refractory metal carbide coatings to commercial graphite to serve as boron diffusion barriers and the use of very high purity pyrolytic graphite components ultimately led to the growth of SiC boules with boron concentrations as low as 2.4x1015 atoms/cm3. The effect of growth temperature and pressure were closely examined over a range from 2100°C to 2300°C and 5 to 13.5 Torr. This range of growth conditions and growth rates had no effect on B incorporation. Attempts to alter the gas phase stoichiometry through addition of hydrogen gas to the growth environment also had no impact on B incorporation. These results are explained by considering site competition effects and the ability of B to diffuse through the graphite growth cell components.