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Papers by Author: Sylvain Garaud

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Impact of Galvanic Corrosion on Metal Gate Stacks

Authors: Masayuki Wada, Sylvain Garaud, I. Ferain, Nadine Collaert, Kenichi Sano, James Snow, Rita Vos, L.H.A. Leunissens, Paul W. Mertens, Atsuro Eitoku

Abstract: High-k gate dielectrics (HK), such as HfO2 or HfSiON, are being considered as the gate dielectric option for the 45nm node and beyond. In order to alleviate the Fermi-level pinning issue and to enhance the CET (Capacitive Effective Thickness) by generating the depletion layer in poly-Silicon gate, metal gate electrodes with proper work functions (WF) have to be used on the high-k dielectrics.

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Galvanic Corrosion of Stacked Metal Gate Electrodes during Cleaning in HF Solutions

Authors: Sylvain Garaud, Rita Vos, Denis Shamiryan, Vasile Paraschiv, Paul W. Mertens, Jan Fransaer, Stefan De Gendt

Wafer Backside Cleaning Strategies for High-k/Metal Gate Processing

Authors: Rita Vos, Els Kesters, Sylvain Garaud, R. De Waele, Karine Kenis, Marcel Lux, H. Kraus, James Snow, Denis Shamiryan, Gabriela Catana, W. Deweerd, T. Schram, S. DeGendt, Paul W. Mertens

Abstract: In this work the removal of different metallic and particulate contaminants relevant for high-k/metal gate processing is studied. Best cleaning efficiency of both silicon and nitride substrates is achieved using a HF/HNO3-based cleaning resulting in a particle removal efficiency higher than 90% and metal removal down to 1010 at/cm2.

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Selective Wet Removal of Hf-Based Layers and Post-Dry Etch Residues in High-k and Metal Gate Stacks

Authors: Martine Claes, Vasile Paraschiv, S. Beckx, M. Demand, W. Deweerd, Sylvain Garaud, H. Kraus, Rita Vos, James Snow, Werner Boullart, Stefan De Gendt