Papers by Author: Tamara Isaacs-Smith

Abstract: The pulsed MOS-C (Metal Oxide Semiconductor-Capacitor) technique was used to measure generation lifetimes in 4H-SiC epitaxial wafers. The ratio of generation to recombination lifetime has been investigated to understand the dominant defect for generation lifetime. The EH6/7 defect level is considered to limit generation lifetime and field enhanced emission is proposed to explain extremely large variation of generation lifetime in a small area. Generation lifetime is limited by dislocations when they are above a threshold density of about 106cm-2. Generation lifetimes measured on 4 and 8 degree off-cut angle epi-substrates are very comparable.

Abstract: The operation of metal-oxide-semiconductor (MOS) devices based on the semiconductor SiC in high temperature environments above 300 °C requires an understanding of the physical processes in these capacitor structures under operating conditions. In this study we have focused on the regime of inversion biasing, where the electrical characteristics of the device are dominated by minority carriers. We report on the direct observation of the high frequency inversion capacitance due to thermal generation of holes in 6H-SiC n-MOS capacitors between 450 and 600 °C by monitoring the 1MHz C-V characteristics of large area, 1000 μm diameter, capacitors in the dark. Our experimental results are consistent with a first order calculation based on the delta depletion approximation.

Abstract: Compared to silicon, there have been relatively few comparative studies of recombination and carrier lifetimes in SiC. For the first time, both generation and recombination carrier lifetimes are reported from the same areas in 20 m thick 4H SiC n-/n+ epi-wafer structures. The ratio of the generation to recombination lifetime is much different in SiC compared to Si. Activation energy calculated from SiC generation lifetimes shows that traps with energy levels near mid-gap dominate the generation lifetime. Comparison of both generation and recombination lifetimes and dislocation counts measured in the device area show no correlation in either case.

Abstract: Post-oxidation anneals that introduce nitrogen at the SiO2/4H-SiC interface have been most effective in reducing the large interface trap density near the 4H-SiC conduction band-edge for (0001) Si face 4H-SiC. Herein, we report the effect of nitridation on interfaces created on the (11 20) a-face and the (0001) C-face of 4H-SiC. Significant reductions in trap density (from >1013 cm-2 eV-1 to ~ 1012 cm-2 eV-1 at EC-E ~0.1 eV) were observed for these different interfaces, indicating the presence of substantial nitrogen susceptible defects for all crystal faces. Annealing nitridated interfaces in hydrogen results in a further reduction of trap density (from ~1012 cm-2 eV-1 to ~5 x 1011 cm-2 eV-1 at EC-E ~0.1 eV). Using sequential anneals in NO and H2, maximum field effect mobilities of ~55 cm-2 V-1s-1 and ~100 cm-2 V-1s-1 have been obtained for lateral MOSFETs fabricated on the (0001) and (11 20) faces, respectively. These electronic measurements have been correlated to the interface chemical composition.

Abstract: Silicon has been the semiconductor of choice for microelectronics largely because of the unique properties of its native oxide (SiO2) and the Si/SiO2 interface. For high-temperature and/or high-power applications, however, one needs a semiconductor with a wider energy gap and higher thermal conductivity. Silicon carbide has the right properties and the same native oxide as Si. However, in the late 1990’s it was found that the SiC/SiO2 interface had high interface trap densities, resulting in poor electron mobilities. Annealing in hydrogen, which is key to the quality of Si/SiO2 interfaces, proved ineffective. This paper presents a synthesis of theoretical and experimental work by the authors in the last six years and parallel work in the literature. High-quality SiC/SiO2 interfaces were achieved by annealing in NO gas and monatomic H. The key elements that lead to highquality Si/SiO2 interfaces and low-quality SiC/SiO2 interfaces are identified and the role of N and H treatments is described. More specifically, optimal Si and SiC surfaces for oxidation are identified and the atomic-scale processes of oxidation and resulting interface defects are described. In the case of SiC, we conclude that excess carbon at the SiC/SiO2 interface leads to a bonded Si-C-O interlayer with a mix of fourfold- and threefold-coordinated C and Si atoms. The threefold coordinated atoms are responsible for the high interface trap density and can be eliminated either by H-passivation or replacement by N. Residual Si-Si bonds, which are partially passivated by H and N remain the main limitation. Perspectives for the future for both Si- and SiC-based MOSFETs are discussed.

Abstract: SiC based field-effect devices are attractive for electronic and sensing applications above 250 °C. At these temperatures the reliability of the insulating dielectric in metal-oxidesemiconductor (MOS) structures becomes an important parameter in terms of long-term device performance. We report on the reliability of n-MOS SiC capacitors following thermal stress cycling in the 330 to 630 °C range. As the primary mode of oxide breakdown under these conditions is believed to be due to electron injection from the substrate, the gate leakage current was measured as a function of temperature. The gate dielectric was grown using dry oxidation with a post oxidation NO passivation anneal. For large area, 1 mm diameter, 6H-SiC capacitors we obtain current densities as low as 5nA/cm2 at 630 °C. In addition, gate leakage measurements from arrays of 300 to 1000 2m diameter devices fabricated on different 1cm2 6H-SiC substrates are presented. These are encouraging results for the long-term reliability of SiC field-effect sensors.