Design and Research of Digital Decimation Filter Based on FPGA

Abstract:

This paper studies and analyses various digital filter and decimation structure. On this basis, by using QUARTUS development system design the decimation device modules, through the waveform simulation validated its correctness. Finally,a program is written into FPGA chip by the hardware platform. In the digital down conversion (DDC), CIC (cascade integral comb) filter plays an important role. It is mainly used for sampling rate, as well as low-pass filter effect. The main characteristics of CIC filter, using only adders, subtractor and register (no multiplier), so fewer resources occupied, implementation is simple and high speed. Based on the analysis of the principle of CIC filter,simulate and synthesize based on the theory of using VHDL language in FPGA. And successful application in the development of DDC chip. Keyword: CIC (cascade integral comb) filter,FPGA,VHDL

• Periodical: Applied Mechanics and Materials (Volumes 105-107)
• Pages: 2086-2091
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.105-107.2086
• Online since: September 2011
• Authors: Yao Li
• Keywords: Cascade Integral Comb (CIC) Filter, Field-Programmable Gate Array (FPGA), Very High Speed Integrate Circuit Hardware Description Language (VHDL)

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