The Analysis on the Parasitic Capacitors Effect of the Fully Differential Architecture of SAR ADC

Abstract:

This paper presents an analysis on the parasitic capacitors effect of the fully differential architecture to provide common-mode rejection. The parasitic capacitors of differential comparator inputs has no effect on the resolution, however, the difference of comparator input parasitic capacitors may has great effect on the resolution. The relationship between the unity capacitor and the parasitic capacitors of the differential comparator inputs is analyzed by giving precise theoretical demonstration. Therefore, a theoretical basis is provided for designers to choose appropriate unity capacitor, process and layout in the design of SAR SAD with fully differential structure.

• Periodical: Applied Mechanics and Materials (Volumes 20-23)
• Pages: 342-345
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.20-23.342
• Online since: January 2010
• Authors: Lei Sun, Qin Yuan Dai, Chuang Chuan Lee, Gao Shuai Qiao
• Keywords: Capacitor Segmentation, Charge Redistribution, Successive Approximation Register (SAR) ADC, System on Chip (SoC)

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