Design and Simulation of High Spectral Purity Numerically Controlled Oscillator

Abstract:

We present a new technique to the design of high spectral purity numerically controlled oscillator (NCO). In this work, a single look up table (LUT) with sine amplitudes at equally spaced samples was used to approximate the complete sine wave cycle. A simple computation process has been conducted to evaluate the slope coefficients, thus the LUT for mapping those values is eliminated. As a result the NCO structure has been efficiently simplified and the memory reduction has resulted in noticeable logic element (LE) saving. The proposed NCO has been simulated using Xilinx toolbox within the MATLAB Simulink environment. It is shown that the spurious free dynamic range (SFDR) of 96 dBc has been achieved and a compression ratio of 256:1 was attained.

• Periodical: Applied Mechanics and Materials (Volumes 229-231)
• Pages: 2117-2121
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.229-231.2117
• Online since: November 2012
• Authors: Qahtan Khalaf Omran, M.T. Islam, Norbahiah Misran
• Keywords: Direct Digital Frequency Synthesizer, Numerically Controlled Oscillator, Phase to Sine Amplitude Conversions

References

[1] J. Tierney, C Rader, B. Gold, A digital frequency synthesizer, IEEE Transaction on Audio and Electro acoustics, Vol. 19, No. 1, pp.48-57, March (1971).

DOI: 10.1109/tau.1971.1162151

[2] J. Jiang and E. K. F. Lee, A low-power segmented nonlinear DAC based direct digital frequency synthesizer, IEEE J. Solid-State Circuits, vol. 37, no. 10, p.1326–1330, Oct. (2002).

DOI: 10.1109/jssc.2002.803047

[3] X. Geng, X. Yu, F. F. Dai, D. Irwin, and R. Jaeger, An 11-bit 8. 6 GHz direct digital synthesizer MMIC with 10-bit segmented sine-weighted DAC, IEEE J. Solid-State Circuits, vol. 45, no. 2, p.300–313, Feb. (2010).

DOI: 10.1109/jssc.2009.2037542

[4] X. Geng, F. F. Dai, J. D. Irwin, and R. C. Jaeger, 24-bit 5. 0 GHz direct digital synthesizer RFIC with direct digital modulations in 0. 13um SiGe Bi CMOS technology, IEEE J. Solid-State Circuits, vol. 45, no. 5, p.944–954, May (2010).

DOI: 10.1109/jssc.2010.2041398

[5] A. M. Sodagar, and G. R. Lahiji, Mapping from phase to sine amplitude in direct digital frequency synthesizers using parabolic approximation, IEEE Trans. on circuits and systems-II: analog and digital signal processing, vol. 47, no. 12, pp.1452-1457, Dec. (2000).

DOI: 10.1109/82.899639

[6] J. M. P. Langlois, D. Al-Khalili, Novel approach to the design of direct digital frequency synthesizers based on linear interpolation. IEEE Trans. Circuit Syst. II, Analog Digital Signal Process 50(9), 567–578(2003).

DOI: 10.1109/tcsii.2003.815020

[7] H. Jafari, A. Ayatollahi, and S. Mirzakuchaki, A low power, high SFDR, ROM-less direct digital frequency synthesizer, in Proc. IEEE Conference on Electron Devices and Solid-State Circuits, pp.829-832, Dec. (2005).

DOI: 10.1109/edssc.2005.1635406

[8] J. -M. Huang, C. -C. Lee, and C. -C. Wang, A ROM-less direct digital frequency synthesizer based on 16-segment parabolic polynomial interpolation, in Proc. 15th IEEE International Conference on Electronics, Circuits and Systems, pp.1018-1021, Sept. (2008).

DOI: 10.1109/icecs.2008.4675029

[9] X. Li, L. Lai, A. Lei and Z. Lai, A direct digital frequency synthesizer based on two segment fourth-order parabolic approximation, IEEE Trans. on Consumer Electronics, vol. 55, no. 2, pp.322-326, May (2009).

DOI: 10.1109/tce.2009.5174388

[10] R. A. Freeman, Digital sine conversion circuit for use in direct digital synthesizers, U.S. Patent 4 809 205(1989).

[11] S. -I. Liu, T. -B. Yu, H. -W. Tsao, Pipeline direct digital frequency synthesizer using decomposition method. IET Journal 148(3), 141–144(2001).

[12] E. Murphy, C. Slattery: Direct Digital Synthesis (DDS) Controls Waveforms in Test, Measurement, and Communications, Analog Dialogue 39-08, August (2005).