Design and Implementation of Manchester CODEC Based on FPGA

Yun Hua Zuo; Jun Yang; Xiao Yu Cheng

doi:10.4028/www.scientific.net/AMM.273.805

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vol. 273Design and Implementation of Manchester CODEC...

Design and Implementation of Manchester CODEC Based on FPGA

Abstract:

This paper designed and realized Manchester encoder and decoder based on FPGA. The M sequence generator produced input baseband signal, Manchester CODEC possessed parity check function, and the output signals of encoding and decoding were stable. This design used VHDL language programme, encoder and decoder used modular design, simulated and tested in Altera development software Quartus II 8.0, and downloaded to FPGA chip Cyclone II EP2C35F672C6 for verification. The results showed that the design scheme is good to realize Manchester CODEC, and possesses good stability and reliability.

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Periodical:

Applied Mechanics and Materials (Volume 273)

Pages:

805-809

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.273.805

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Online since:

January 2013

Authors:

Yun Hua Zuo, Jun Yang, Xiao Yu Cheng

Keywords:

Field-Programmable Gate Array (FPGA), Manchester Code, Quartus II, VHDL

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