Research on Timing of on-Chip Power Supply Noise with Analysis of Scientific Data Materials

Abstract:

Aiming at the problems of the influence in power-supply variations on timing analysis, this paper presents a new method to assign a supply-dependent hold margin based on analysis of scientific data materials, which describe a method to accurately characterize logic gates for the sensitivity of delay on supply-voltage variations, and then the method use a commercial microcontroller as a design example. Experiment results shows that the new method with analysis of scientific materials can get a good performance, even under the existing noise.

• Periodical: Applied Mechanics and Materials (Volume 310)
• Pages: 494-497
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.310.494
• Online since: February 2013
• Authors: Xiao Guang Li
• Keywords: Gate Delay, Hold Margins, Integrated Circuits Simulation, Power Supply Noise

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