A Design of High Frequency Clock Generation Circuit

Abstract:

A clock generation circuit is proposed based on CMOSFET technology, which is comprised of a reference voltage source, a common source voltage amplifier, voltage controlled oscillator and timing circuit. By which a particular clock is produced, whose duty cycle is less than 50%. It is used 0.5 μ s CMOS process, HSPICE simulation results indicates that the average frequency of clock signal is 2.071MHz, and the average duty cycle is 31.565% .

• Periodical: Applied Mechanics and Materials (Volumes 347-350)
• Pages: 1492-1496
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.347-350.1492
• Online since: August 2013
• Authors: Yan Nan Zhai, Ling Gao, Yan Kun Tang, Jing Li, Shuang Luan
• Keywords: Clock Signal, HSPICE, Voltage Controlled Oscillator

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