Design and Implementation of Cell Search Time Synchronization in LTE System Based on FPGA

De Min Zhang; Xiang Zhu; Zhi Hui Qiu; Chao Bo Duan

doi:10.4028/www.scientific.net/AMM.380-384.4076

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 380-384Design and Implementation of Cell Search Time...

Design and Implementation of Cell Search Time Synchronization in LTE System Based on FPGA

Abstract:

LTE is accepted worldwide as the Long Term Evolution Perspective for todays 3G and 4G networks. Cell search time synchronization is an important physical layer procedure by which a user equipment (UE) acquires synchronization with a cell and detects the physical layer cell ID of that cell. Timing synchronization is consisted of the symbol timing synchronization and frame synchronization. This paper supplies the introduction of synchronization signals, presents the detection method, and analyzes the design based on FPGA platform and finally simulated on the Modelsim 6.5 and implemented in Xilinx Virtex-6 kit.

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Periodical:

Applied Mechanics and Materials (Volumes 380-384)

Pages:

4076-4079

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.380-384.4076

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Online since:

August 2013

Authors:

De Min Zhang, Xiang Zhu, Zhi Hui Qiu, Chao Bo Duan

Keywords:

PSS, SSS FPGA Implementation, TD-LTE, Timing Synchronization

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