Design and Implementation of Buffer Control in EoS System

Wei He; Yan Gan Zhang; Xue Guang Yuan; Jin Nan Zhang

doi:10.4028/www.scientific.net/AMM.411-414.684

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 411-414Design and Implementation of Buffer Control in EoS...

Design and Implementation of Buffer Control in EoS System

Abstract:

We propose an optimization approach to EoS (Ethernet over SDH) buffer control which the objective is to dynamically adjust the EoS buffer management registers. We will present the improved model of the traffic buffer management based on embedded MCU to control the SDRAM of the EoS chip, and setup the end-to-end system to illustrate the feasibility and advantage of the solution in buffer management when the data transport rate suddenly exceed the bandwidth of Ethernet port.

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Periodical:

Applied Mechanics and Materials (Volumes 411-414)

Pages:

684-687

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.411-414.684

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Online since:

September 2013

Authors:

Wei He, Yan Gan Zhang, Xue Guang Yuan, Jin Nan Zhang

Keywords:

Buffer Management, EOS, Ethernet, SDH, SDRAM

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