The Research on Static Characteristics of 1700V/100A Planner NPT-IGBT

Abstract:

A 1700V/100A NPT-IGBT was designed by process simulation, which had an internal transparent collector and a planner cell structure. The Static characteristics were studied. The simulation results show that the threshold voltage of the device can be adjusted by changing the injection dose or the drive-in time of the p-well. The saturation voltage of the device can be adjusted by changing injection dose of the p-well or the internal transparent collector. This device was fabricated using a self-aligned process, the test results show that the breakdown voltage is more than 2100V, the saturation voltage is between 2.5V and 2.7V and the threshold voltage is between 3.9V and 5.9V, which are similar with the simulation results.

• Periodical: Applied Mechanics and Materials (Volumes 433-435)
• Pages: 1572-1577
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.433-435.1572
• Online since: October 2013
• Authors: Ming Chao Gao*, Jun Liu, Ge Zhao, Jiang Liu, Rui Jin, Kun Shan Yu, Hai Long Bao
• Keywords: Breakdown Voltage, Cell, IGBT, Saturation Voltage, Threshold Voltage

References

[1] T. Laska, A. Porst, H. Brunner, W. Kiffe. A Low Loss/Highly Rugged Igbt-Generation Based on A Self Aligned Process with Double Implanted N/N+-Emitter [J]. Proceedings of the international symposium on power semiconductoe devices and ICS-IEEE, 1994: 171-176.

DOI: 10.1109/ispsd.1994.583694

[2] Tomoki Inoue, Hideaki Ninomiya, Koichi Sugiyama al. New Collector Design Concept for 4. 5kV Injection enhanced Gate Transistor (IEGT)"[J], Proc. ISPSD 2002, 2002: 49-52.

DOI: 10.1109/ispsd.2002.1016168

[3] Yoshikazu Takahashi, Koh Yoshikawa, Takeharu Koga et al. Proceedings of 1995 Intemational Symposium on Power Semiconductor Devices & ICs[J], Yokohama, 1995: 70-74.

[4] Sze S M. Physics of Semiconductor Devices. New York: Murray Hill, (1981).

[5] G. Majumdar, J. Yamashita, H. Nishihara, et al. A New Generation High Speed Low Loss IGBT Module, ISPSD, May (1992).

[2] 168-171.

[6] A.S. Grove, O. Leistiko, W. W HOOPER et al. Effect of surface fields on the breakdown voltage of planar silicon P-N junctions[J], IEEE Trans. Electron Devices, 1967, ED-14(3): 157-162.

DOI: 10.1109/t-ed.1967.15916

[7] Grandi S K, Temple V A K. Semiconductor Power Devices[J]. IEEE Trans. Elect. Dev, 1983, ED-30 (8): 843-846.

[8] Wolfgang Feiler, Elmar Falck, and Willi Gerlach. Multistep Field Plates for High-Voltage Planar p-n Junctions[J]. IEEE Trans. Elect. Dev. 1992, 39(6): 1514-1520.

DOI: 10.1109/16.137334