Low Phase Noise and Low Power Voltage-Controlled-Oscillator Using Current-Reuse Techniques for Wireless Communication Circuits

Tsung Han Han; Meng Ting Hsu; Cheng Chuan Chung

doi:10.4028/www.scientific.net/AMM.479-480.1010

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 479-480Low Phase Noise and Low Power...

Low Phase Noise and Low Power Voltage-Controlled-Oscillator Using Current-Reuse Techniques for Wireless Communication Circuits

Abstract:

In this paper, we present low phase noise and low power of the voltage-controlled oscillators (VCOs) for 5 GHz applications. This chip is implemented by Taiwan Semiconductor Manufacturing Company (TSMC) standard 0.18 μm CMOS process. The designed circuit topology is included a current-reused configuration. It is adopted memory-reduced tail transistor technique. At the supply voltage 1.5 v, the measured output phase noise is-116.071 dBc/Hz at 1MHz offset frequency from the carrier frequency 5.2 GHz. The core power consumption is 3.7 mW, and tuning range of frequency is about 1.3 GHz from 4.8 to 6.1 GHz. The chip area is 826.19 × 647.83 um².

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Periodical:

Applied Mechanics and Materials (Volumes 479-480)

Pages:

1010-1013

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.479-480.1010

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Online since:

December 2013

Authors:

Tsung Han Han, Meng Ting Hsu, Cheng Chuan Chung

Keywords:

Current-Reused, Low Power, Phase Noise, Tuning Range, Voltage Controlled Oscillator

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