Realization of 1024 Points Fast Fourier Transform Based on FPGA IPCore

Abstract:

Requirement on signal processing of radar level system is higher and higher at present. Standards such as generalization, systematic and modular cannot be satisfied through traditional methods which were using software program, application specific integrated circuit (ASIC) to achieve fast flourier transform (FFT). Therefore taking advantage of field programmable gate array (FPGA) to complete FFT had been the choosing trend of most researchers. Based on arithmetic FFT raised by Cooley-Tukey, a new design scheme of base-4 FFT was put forward in this paper. The design flow of FFT was fairly simple for the rich resource and flexible intellectual property core (IP Core). Simulation and experiment results indicated that this method was easy and flexible, accuracy and reliable. And it can decrease the development period. The calculation speed was also improved greatly.

• Periodical: Applied Mechanics and Materials (Volumes 496-500)
• Pages: 1885-1888
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.496-500.1885
• Online since: January 2014
• Authors: Jian Wei Leng*, Qiong Qiong Xu
• Keywords: Fast Flourier Transform, Field-Programmable Gate Array (FPGA), Intellectual Property Core, Signal Procession

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