Energy Efficient Scheduling Using Simulated Annealing Algorithm for Multi-Core Processors

Abstract:

The role of multi-core processors in recently developed real-time systems is gaining importance because of its energy and thermal conditions. The major development requirements and objectives to be met while designing multi-core processors are: low heat dissipation, low energy consumption and long battery life, which also helps to reduce the system costs. This paper is presented with an aim to achieve a better system performance in a multi-core processor platform by adjusting the trade-off between system performance and power dissipation. Dynamic Power Management (DPM) and Dynamic Voltage Scaling (DVS) are the two run-time techniques used to adjust the trade-off between the system performance and power dissipation. Simulated Annealing (SA) algorithm is implemented in order to find a good approximation to the global optimum. The idea behind Simulated Annealing algorithm is to iteratively improve the solution by investigating the neighbour solutions.

• Periodical: Applied Mechanics and Materials (Volume 550)
• Pages: 178-186
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.550.178
• Online since: May 2014
• Authors: M. Poongothai*, A. Rajeswari, V. Sanmukapriya
• Keywords: Dynamic Power Management (DPM), Dynamic Voltage Scaling (DVS), First Fit Algorithm (FF), Largest Task First Algorithm (LTF), Leakage Aware Algorithm (LA), Multi-Core Processor, Penalty Value, Reward Value, Simulated Annealing Algorithm (SA)

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