A Method of Test Point Optimization Selection for Analog Circuits

Zhong Qun Li; Xu Fei Wang; Shu Nong Zhang; Jia Ming Liu

doi:10.4028/www.scientific.net/AMM.568-570.3

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A Method of Test Point Optimization Selection for Analog Circuits
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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 568-570A Method of Test Point Optimization Selection for...

A Method of Test Point Optimization Selection for Analog Circuits

Abstract:

In analog electronic systems, characteristic information required for fault prognosis is achieved by test points of a board, so the selection and optimization of test points is an important topic for PHM research of electronic products. Current methods for selection of test points generally rely on functional simulation analysis or testability modeling analysis. Based on this, FMMEA method is introduced to find failure susceptibility components in this paper, moreover, through simulating and calculating the predictability of test points, the final test points are determined. As an example, a board level system is presented to validate this approach.

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Periodical:

Applied Mechanics and Materials (Volumes 568-570)

Pages:

3-7

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.568-570.3

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Online since:

June 2014

Authors:

Zhong Qun Li, Xu Fei Wang, Shu Nong Zhang, Jia Ming Liu

Keywords:

Analog Circuits, FMMEA, Optimization, Predictability, Test Point Selection

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