Parallel Circuit Simulation by Using Simulation-on-Demand and Iterated Timing Analysis

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Abstract:

This paper considers utilizing the popular ITA (Iterated Timing Analysis) algorithm in CSM (Combining Simulation Method) to do parallel large-scale circuit simulation. An automatic partitioning method for jobs of CSM is presented, in which the related load balancing issue is also discussed. All proposed methods have been implemented and tested. Experimental results justify pleasing effects of proposed methods.

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636-639

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July 2014

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© 2014 Trans Tech Publications Ltd. All Rights Reserved

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