Anti-ESD Improvement of a Power nLDMOS with a Perpendicular Super-Junction Construction in the Drain Side

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An HV 60-V nLDMOS by adding a perpendicular-type super-junction (SJ) structure and changing pillar widths in the drain side will be investigated in this paper. In order to verify some physical parameters influences on the ESD capability, a TLP testing equipment will be used for obtaining the secondary breakdown current (It2) in different DUTs. In It2 values comparison, an SJ-nLDMOS is higher than that of a traditional nLDMOS, and as the pillar width increased the equivalent HBM value can be up to 4.799-kV. Finally, from the relationship between the SJ-nLDMOS and Ref. DUT, it can be found that an SJ structure is good for ESD discharge, as compared with the Ref. group can be increasing by 25%. In addition, the Vt1 and Vh value of various kinds of SJ-nLDMOS will decline than the traditional nLDMOS.

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195-200

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July 2014

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© 2014 Trans Tech Publications Ltd. All Rights Reserved

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[1] A.G.M. Strollo, E. Napoli: IEEE Transactions on Electron Devices Vol. 48(9) (2001) p.2161.

Google Scholar

[2] P.N. Kondekar, C.D. Parikh, M.B. Patil: IEEE 33rd Annual Power Electronics Specialists Conference (2002) p.1769.

Google Scholar

[3] R.P. Zingg: IEEE Transactions on Electron Devices Vol. 51(3) (2004) p.492.

Google Scholar

[4] P.N. Kondekar: International Conference on Microelectronics (2010) p.495.

Google Scholar

[5] Bei Liang, Fa-shun Yang, Zhao Ding, Xing-hua Fu: International Conference on Electronics, Communications and Control (2011) p.467.

Google Scholar

[6] Ming Qiao, Wen-Lian Wang, Zhao-Ji Li, Bo Zhang: IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (2012) p.1.

Google Scholar

[7] Wen-Yi Chen, Ming-Dou Ker, Yeh-Ning Jou, Yeh-Jen Huang, Geeng-Lih Lin: IEEE 16th International Symposium on the Physical and Failure Analysis of Integrated Circuits (2009) p.41.

DOI: 10.1109/apccas.2008.4745960

Google Scholar

[8] Shen-Li Chen, Tzung-Shian Wu: International Journal of Energy Science Vol. 3(5) (2013) p.349.

Google Scholar

[9] V. Parthasarathy, V. Khemka, R. Zhu, J. Whitfield, R. Ida, A. Bose: 14th International Symposium on Power Semiconductor Devices and ICs (2002) p.265.

DOI: 10.1109/ispsd.2002.1016222

Google Scholar

[10] Lingli Jiang, Ming Qiao, Zhaoji Li , Bo Zhang: International Conference on Communications, Circuits and Systems (2009) p.638.

Google Scholar

[11] M. Shrivastava and H. Gossner: IEEE Transactions on Device and Materials Reliability Vol. 12(4) (2012) p.615.

Google Scholar

[12] Shen-Li Chen and Min-Hua Lee: American Applied Sciences Research Institute (AASRI) Procedia (2013) in press.

Google Scholar

[13] Jian-Hsing Lee, S.H. Chen, Y.T. Tsai, D.B. Lee, F.H. Chen, W.C. Liu, C.M. Chung, S.L. Hsu, J.R. Shih, A.Y. Liang, K. Wu: 19th International Symposium on Power Semiconductor Devices and IC's (2007) p.173.

DOI: 10.1109/ispsd.2007.4294960

Google Scholar

[14] M. -D. Ker, C. -L. Hou, C. -Y. Chang, and F. -T. Chu: 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits (2004) p.209.

Google Scholar

[15] Z. Piatek, J.F. Kolodziejski, W.A. Pleskacz: IEEE Design and Diagnostics of Electronic Circuits and Systems (2007) p.1.

DOI: 10.1109/ddecs.2007.4295323

Google Scholar