Impulse GPR Echo Parallel Acquisition System Design Based on FPGA

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Abstract:

On the basis of the characteristics of the shock pulse GPR echo signal and by using the principle of clock distribution control parallel data acquisition, we realize the high-speed data acquisition with low-speed parallel ADC device. The system consists of part of the signal input module, signal conditioning module, clock distribution module, data acquisition module and FPGA control module. The design with Simple circuit, level of clarity and good stability. It has practical significance and provides some reference to designers of other high-speed A/D conversion.

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2917-2921

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August 2014

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© 2014 Trans Tech Publications Ltd. All Rights Reserved

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