The Status and Challenges of Multi-Processor System-on-Chip’s Formal Verification

Lin Tang; Jin Zhao Wu

doi:10.4028/www.scientific.net/AMM.602-605.2926

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 602-605The Status and Challenges of Multi-Processor...

The Status and Challenges of Multi-Processor System-on-Chip’s Formal Verification

Abstract:

With the continuous advancement of processor manufacturing process as well as the exposed limitations of single-core Processors, Multi-Processor System-on-Chip (MPSoC) has become the inevitable outcome of the technological development and practical application needs. It is used to meet the requirements of multitasking, multifunctional and high performance computing. With the improvement of chip complexity, verification module also increases exponentially. Verification of MPSoC is becoming Bottleneck in the process of chip’s design. So this paper first introduces the origin of MPSoC, and analyzes developing tendency of its verification. And then, the theory and main challenges to the formal verification of MPSoC are discussed. This paper will provide support for building the verified theory method and technology that can meet the demand of MPSoC design, and Developing MPSoC high-level architecture design verification technology.

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Periodical:

Applied Mechanics and Materials (Volumes 602-605)

Pages:

2926-2929

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.602-605.2926

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Online since:

August 2014

Authors:

Lin Tang, Jin Zhao Wu*

Keywords:

Formal Verification, Functional Verification, Hybrid Computing, MPSoC, Performance Verification

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* - Corresponding Author

References

[1] K. Goossens, J. Dielissen, A. Radulescu, Aethereal network on chip: concepts, architectures, and implementations, IEEE Design and Test of Computers. 22(5) (2005) 414-421.

DOI: 10.1109/mdt.2005.99

Google Scholar

[2] A. Brekling, M.R. Hansen, J. Madsen, Models and formal verification of multiprocessor system-on-chips, Journal of Logic and Algebraic Programming. 77(1-2) (2008) 1-19.

DOI: 10.1016/j.jlap.2008.05.002

Google Scholar

[3] K. Richter, M. Jersak, R. Ernst, A formal approach to MPSoC performance verification, Computer. 36 (4) (2003)60-67.

DOI: 10.1109/mc.2003.1193230

Google Scholar

[4] S.Y. Huang, K.T. Cheng, Formal equivalence checking and design debugging, Kluwer Academic Publisher, London, (1999).

Google Scholar

[5] E.M. Clarke, P.A. Sistla, Automated verification of finite-state concurrent systems using temporal logic specifications, ACM Transactions on Programming Languages and Systems. 8(2) (1986) 244-263.

DOI: 10.1145/5397.5399

Google Scholar

[6] B. Becker, A. Podelski, W. Damm, et al, SFB/TR 14 AVACS –automatic verification and analysis of complex systems, IT Information Technology. 49 (2007) 118-125.

DOI: 10.1524/itit.2007.49.2.118

Google Scholar

[7] A. Platzer, Differential dynamic logic for hybrid systems, Journal of Automated Reasoning. 41 (2008) 143-189.

DOI: 10.1007/s10817-008-9103-8

Google Scholar