High Speed Data Transfer System Based on the USB3.0 Technology

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Abstract:

A data acquisition system is introduced based on FPGA and USB3.0 to achieved high transfer rate. FPGA control AD and manage the DDR RAM buffer. The USB connect model is synchronous Slave FIFO. The multi data buffer queue structure is selected as the data structure. The testing results show that the average storage rate is 229.1MByte/s.When using two hard disk, the rate can reach to 289.8MByte/s.Some key factors affect the transfer rate is also discussed.

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381-384

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September 2014

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© 2014 Trans Tech Publications Ltd. All Rights Reserved

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