Conduction Uniformity Improvement of ESD Protection Device in 0.35 μm Partially-Depleted SOI Salicided CMOS Technology

Zhuo Tian; Bai Cheng Li

doi:10.4028/www.scientific.net/AMM.687-691.3251

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 687-691Conduction Uniformity Improvement of ESD...

Conduction Uniformity Improvement of ESD Protection Device in 0.35 μm Partially-Depleted SOI Salicided CMOS Technology

Abstract:

ComparedtobulkCMOStechnology,Silicon-on-Insulator (SOI) CMOS technology has many advantages, such as low power consumption, low leakage current, low parasitic capacitance and a low soft error rate from both alpha particles and cosmic rays. However,electrostatic discharge (ESD) protection in SOI technology is still a major substantial barrier to overcome for the poor thermal conductivity of isolation oxide and the absence of vertical diode and silicon controlled rectifier (SCR).

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Periodical:

Applied Mechanics and Materials (Volumes 687-691)

Pages:

3251-3254

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.687-691.3251

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Online since:

November 2014

Authors:

Zhuo Tian*, Bai Cheng Li

Keywords:

BTS Structure, Conduction Uniformity, ESD Protection, GGnMOS, PD SOI

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References

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