A Hardware Implementation of Real Time Lossless Data Compression and Decompression Circuits

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This paper presents a hardware implementation of real time data compression and decompression circuits based on the LZW algorithm. LZW is a dictionary based data compression, which has the advantage of fast speed, high compression, and small resource occupation. In compression circuit, the design creatively utilizes two dictionaries alternately to improve efficiency and compressing rate. In decompression circuit, an integrated State machine control module is adopted to save hardware resource. Through hardware description and language programming, the circuits finally reach function simulation and timing simulation. The width of data sample is 12bits, and the dictionary storage capacity is 1K. The simulation results show the compression and decompression circuits have complete function. Compared to software method, hardware implementation can save more storage and compressing time. It has a high practical value in the future.

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554-560

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January 2015

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© 2015 Trans Tech Publications Ltd. All Rights Reserved

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[1] D. A. Huffman A method for the construction of minimum-redundancy codes, Proc. IRE, Vol. 40, pp.1098-1101, Sept. (1952).

DOI: 10.1109/jrproc.1952.273898

Google Scholar

[2] R. Samanta, R.N. Mahapatra, An enhanced CAM architecture to accelerate LZW compression algorithm, Proceedings of the IEEE International Conference on VLSI Design, pp.824-829, (2007).

DOI: 10.1109/vlsid.2007.34

Google Scholar

[3] Zhang Feng-lin and Liu Si-feng, An improved LZW data compression algorithm, Mini-Micro Syst, vol. 27, p.1897–1899, Oct (2006).

Google Scholar

[4] Wang Ping, Realization and Research of LZW Lossless Compression Algorithm, Computer Engineering, vol. 28, pp.98-99, July (2002).

Google Scholar

[5] Hongtao yu, Zhiping Lin, Senior Member, IEEE, and Feng Pan, Senior Member, IEEE. plications and Improvement of H . 264 in Medieal Video Compression,. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, VOL. 52, NO. 12, DECEMBERER (2005).

DOI: 10.1109/tcsi.2005.857869

Google Scholar

[6] T. A. Welch, A technique for high-performance data compression, IEEE Computer, Vol. 17, No. 6, pp.8-19, (1984).

Google Scholar