Design and Implementation of Error Simulator Based FPGA for Optical Data Link Transfer Test

Bin Wei Deng; Chong Han Liu

doi:10.4028/www.scientific.net/AMM.727-728.951

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 727-728Design and Implementation of Error Simulator Based...

Design and Implementation of Error Simulator Based FPGA for Optical Data Link Transfer Test

Abstract:

There is the extremely high radiation in the detector of ATLAS for LHC (Large Hadron Collider). The upgrading ATLAS Liquid Argon Calorimeter readout optical data link includes on-detector (front-end) and off-detector (back-end). There are the data stream burst continuous multi-bits errors and bit slip when the high-speed data are collected and transferred under the extremely high levels of radiation environment on the front-end. The data is restored on the back-end by FPGA. The design and implementation of error simulator based a Xilinx Kintex 7 for front-end is proposed in this paper to support the design and simulation test of the decoder and encoder of LOCic. Experimental and data analysis show it is valid.

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Periodical:

Applied Mechanics and Materials (Volumes 727-728)

Pages:

951-954

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.727-728.951

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Online since:

January 2015

Authors:

Bin Wei Deng*, Chong Han Liu

Keywords:

ATLAS, Error Simulator, High Radiation, Optical Data Link

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