Design and Implement of Sharable Multi-Channel On-Chip Memory for Embedded CMP System

Abstract:

A kind of shared multi-channel on-chip memory architecture (SMC-OCM) for embedded CMPs is proposed in this article. To implement SMC-OCM architecture, the sharable multi-channel on-chip memory (MC-OCM) is designed and implemented based on FPGA. The characteristic of multiple data channel of MC-OCM assures good parallel responsiveness of SMC-OCM system. Experiments showed that the access latency of SMC-OCM is lower than that of the-state-of arts. SMC-OCM architecture satisfies the performance requirements for memory system by embedded applications

• Periodical: Advanced Materials Research (Volumes 217-218)
• Pages: 1147-1152
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.217-218.1147
• Online since: March 2011
• Authors: Cai Xia Liu, Zhi Bin Zhang, Feng Qi Wei, Xiao Dong Xu
• Keywords: CMP Memory Architecture, Sharable Multi-Channel On-Chip Memory, Shared Memory Architecture

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