Application of Optimized DDS Based on FPGA in the Two-Phase Flow

Abstract:

Flow regime recognition of two-phase flow is of great importance in industrial process. This paper describes the role of the field-programmable gate array (FPGA) hardware, in the implementation of electrical resistance tomography (ERT), which is used to analyze gas/liquid two phase flows. Firstly, a brief introduction and some theoretical analysis are made about the basic principles of Direct Digital Synthesizer (DDS). Then a signal source for ERT system based on DDS and FPGA is designed and a kind of compression ROM is realized. The whole system has been simulated in the Quartus II 7.2 simulation environment and successfully downloaded to the chip of the Cyclone II EP2C5F256C6. The operating results and the theoretical results show that the proposed method can greatly improve the developing efficiency, save plenty of the system resources and improve the reliability and flexibility.

• Periodical: Advanced Materials Research (Volumes 268-270)
• Pages: 2066-2071
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.268-270.2066
• Online since: July 2011
• Authors: Lin Li, Hai Tao Shi, Xin Gang Wang
• Keywords: Compression Algorithm, DDS, ERT, Field-Programmable Gate Array (FPGA), Two-Phase Flow

References

[1] M. Amir, G. Sodagar, L. Roientan, Reduced-memory Direct Digital Frequency Synthesizer using Parabolic Initial Guess, Analog Integrated Circuits and Signal Processing. 2003, 34, pp.89-96.

[2] Zs. Pάpay, Numerical Distortion in Single-Tone DDS, IEEE Instrumental andMeasurement Tchnology Conference 200, 1, pp.21-23.

[3] Warsito, W., Fan, L. -S, Measurement of real-time flow structures in gas/liquid and gas/liquid-solid flow systems using electrical capacitance tomography (ECT), Chemical Engineering Science, v 56, pp.21-22, Nov 23, (2001).

DOI: 10.1016/s0009-2509(01)00234-2

[4] Xuehui Zhang, Huaxiang Wang, Digital Phase-sensitive Demodulation in Electrical Capacitance Tomography System, WCICA 2008-The 7th World Congress on Intelligent Control and Automation, Chongqing, China, June 25-27, (2008).

DOI: 10.1109/wcica.2008.4593949

[5] F. Dong, Z.X. Jiang, and X.T. Qiao, Application of Electrical Resistance Tomography to Two-Phase Pipe Flow Parameters Measurement, Flow. Meas. Instrum., 2003, vol. 14, pp.183-192.

DOI: 10.1016/s0955-5986(03)00024-4

[6] F. Dong, Y.B. Xu, L. Hua, and H. X Wang, Two Methods for Measurement of Gas-Liquid Flows in Vertical Upward Pipe Using Dual-plane ERT System, IEEE Transactions on Instrumentation and Measurement, 2006, vol. 55, no. 5, pp.1576-1586.

DOI: 10.1109/tim.2006.881564

[7] Nie Wei, Su Wei, Liu Xing(2008). Design of an experimental digital modulator module based on digital signal processing,. Journal of Beijing University of Chemical Technology, Vol. 35, No. 1, pp.97-100.

[8] Nicholas H T, Samue H, Kim B(1988). The Optimization of Direct Digidal Frequency Synthesizer Performance in the Presence of Finite Word Length Effects,. IEEE ProcA2th AFCS, pp.357-363.

DOI: 10.1109/freq.1988.27625

[9] X.M. Li and X.J. Qu, Application of DDS/FPGA in Signal Generator Systems, Modern Electronics Technique, Vol. 29, No. 9, pp.78-79, (2006).

[10] Z.Q. Zhang and J.B. Zhang, Design of Harmonic Signal Generator Based on DDS/SOPC, Automation & Instrument, vol. 23, No. 8, pp.16-21, (2008).

[11] Y. Yu and X.L. Zheng, Design and Implementation of Direct Digital Frequency Synthesis Sine Wave Generator Based on FPGA, Journal of Electron Devices, Vol. 28, No. 1, pp.596-599, (2005).

[12] W. Li and J.B. Zhang, Research of Parameter Adjustable Harmonic Signal Generator Based on DDS, ISECS International Colloquium on Computing, Communication, Control, and Management, pp.88-91, (2008).

DOI: 10.1109/cccm.2008.11

[13] A. Grama and G. Muntean. Direct digital frequency synthesis implemented on a FPGA chip, the 29th International Spring Seminar on Electronics Technology: Nano Technologies for Electronics Packaging, Conference Proceedings, Piscataway, NJ 08855-1331, United States: Institute of Electrical and Electronics Engineers Computer Society, pp.92-97, (2006).

DOI: 10.1109/isse.2006.365365

[14] S.Y. Yan and J.Z. Li, Research on the DDS/CPLD Control to Generate Special Band Signal, BMEI 2008 (International Conference on BioMedical Engineering and Informatics, 2008), pp.681-684, (2008).

DOI: 10.1109/bmei.2008.152

[15] D.J. Betowski and V. Beiu, Considerations for phase accumulator design for Direct Digital Frequency Synthesizers, IEEE International Conference on Neural Networks and Signal Processing, pp.176-179, (2003).

DOI: 10.1109/icnnsp.2003.1279240