Design of SoC Verification System Based on Multi-FPGA

Xi Han; Zhe Ying Li; Yuan Sheng Liu; Wen Liang Niu

doi:10.4028/www.scientific.net/AMR.532-533.1110

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 532-533Design of SoC Verification System Based on...

Design of SoC Verification System Based on Multi-FPGA

Abstract:

As one of the most advanced research field, the problem of SoC (System on a Chip) design is getting more and more attention. With the promotion of its theory and technique, SoC verification turns to one of the most significant part in the procedure of realizing a usable integrated circuit. And verification using FPGA (Field Programmable Gate Array) which must obey a set of strict technological process is a kind of general way. With the growing complexity and integrated scale of SoC design, a single FPGA chip could hardly satisfy the verification requirement. Then the method of verification using multi-FPGA is taken and expresses some advantages in some respects. Multi-FPGA verification is still in the initial step situation and has a broad developing space. The architecture of multi-FPGA verification platform is given in this paper, as well as some related key technical problem and solutions.

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Periodical:

Advanced Materials Research (Volumes 532-533)

Pages:

1110-1114

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.532-533.1110

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Online since:

June 2012

Authors:

Xi Han, Zhe Ying Li, Yuan Sheng Liu, Wen Liang Niu

Keywords:

Integrated Circuit, Multi-FPGA, SoC, Verification

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References

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