Design of Manchester Codec Based on FPGA

De Cheng Xu; Ji Feng Lu

doi:10.4028/www.scientific.net/AMR.614-615.1357

Paper Titles

A Novel MPPT Method Based on the Synthesis of Quasi-Sliding Mode Control and Dynamic Equivalent Impedance Matching Method
p.1340

Circuit Model of Nonlinear Inductor with Magnetic Core Based on Duality Theory
p.1344

A Research and the Application of a New Graphite Grounding
p.1348

Design of Multi-Performance Monitoring and Control System for an Experimental BIPVs/BAPVs
p.1352

Design of Manchester Codec Based on FPGA
p.1357

Power System Reactive Power Optimization Based on Improved Genetic Agorithm
p.1361

Dual-Mode Control MPPT Algorithm Based on Improved Genetic Algorithm and Perturbation and Observation Method
p.1367

Reactive Power Optimization in Distribution Network with Wind Farm
p.1372

Research of Intelligent Video Surveillance System Based on the 3G Technology
p.1377

HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 614-615Design of Manchester Codec Based on FPGA

Design of Manchester Codec Based on FPGA

Abstract:

Manchester code is a linear code of the data communication,Because of its good self-synchronization capability and robustness ,it is often used in data synchronization.The design of high-speed stability Manchester codec directly affect the efficiency of data transmission.The programmable logic device has brought a lot of flexibility for the design of digital systems.This paper introduces the application of programmable logic device design Manchester encoder and decoder.And giving the corresponding simulation waveforms while debugging successful with CYCLONE chip of ALTERA.

You might also be interested in these eBooks

Advances in Power and Electrical Engineering

View Preview

Info:

Periodical:

Advanced Materials Research (Volumes 614-615)

Pages:

1357-1360

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.614-615.1357

Citation:

Cite this paper

Online since:

December 2012

Authors:

De Cheng Xu*, Ji Feng Lu

Keywords:

Linear Code, Manchester Code, Programmable Logic Device (PLD), Self-Synchronization

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

* - Corresponding Author

References

[1] SU Ming,YAO Dong-ping. FPGA implementation of special asynchronous serial communication interface circuit[J].Internet of Things Technologies,2011(3):65-67.

Google Scholar

[2] TANG Xiao-xi,YIN Lei,XU Yan,CHEN Quan-gen. Design of manchester codec based on FPGA [J].Electronic Design Engineering, 2011(19) ;171-173.

Google Scholar

[3] WANG Chun-xia,NIE Xiang. Design and implementation of temperature control system based on FPGA[J]. Journal of Shanxi University of Technolog,2011(2):15-19.

Google Scholar

[4] HE Lin.Key technology of high speed data acquisition [J].Development of Hi-tech Industry, 2011(71):37.

Google Scholar