Fast and Effective Power Modeling for SRAM Compiler

Qiang Song; Shou Biao Tan; Chun Yu Peng

doi:10.4028/www.scientific.net/AMR.614-615.1465

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 614-615Fast and Effective Power Modeling for SRAM...

Fast and Effective Power Modeling for SRAM Compiler

Abstract:

An efficient SRAM power modeling method based on two formula techniques is proposed, which contains a mathematical method called two-dimensional bilinear interpolation function and a segment analysis on the basis of MUX. This scheme allows us to reach the accurate modeling of SRAM power consumption without complicated calculation and specific circuit analysis. Hsim simulation in 65 nm CMOS process shows our proposed method error is closed to 5%.

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Periodical:

Advanced Materials Research (Volumes 614-615)

Pages:

1465-1470

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.614-615.1465

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Online since:

December 2012

Authors:

Qiang Song, Shou Biao Tan*, Chun Yu Peng

Keywords:

Interpolation, MUX, Power Consumption, SRAM Compiler

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* - Corresponding Author

References

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