Design and Analysis of 2-Stage Pipelining High-Performance SRAM

Abstract:

This paper describes a SRAM design using the pipelining technique which has been used in many microprocessors extensively. The main purpose to design SRAM with the technique of pipelining is to improve the whole performance of the SRAM based on the characteristic of the pipelining technique that it can incease exponentially the circuit performance. A 2-stage pipelining 4K SRAM has been verified by simulation, and the results demonstrate that the performance of the read operation can be improved twice if the pipelining technique has been used compared with the conventional SRAM operation.

• Periodical: Advanced Materials Research (Volumes 614-615)
• Pages: 1524-1529
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.614-615.1524
• Online since: December 2012
• Authors: Qi Long Liu, Min Liu, Xiu Long Wu, Shou Biao Tan
• Keywords: High Performance, Pipelining Technique, Read Operation, SRAM, Writing Power

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