Linearity Analysis of GME-TRC MOSFET Using SiO2 as a Gate Insulator at High Temperature

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This paper analysis the impact of temperature variation on gate material engineered trapezoidal recessed channel (GME-TRC) MOSFET and trapezoidal recessed channel (TRC) MOSFET, using ATLAS: 3D device simulator [. The study focuses on the linearity and analog performance comparison of GME-TRC and TRC MOSFETs and the impact of temperature variations on some of the key parameters like drain current, transconductance and the optimum bias point in terms of gm3 (third order derivative of Ids-Vgs) and VIP3 has been analysed.

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207-210

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April 2013

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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