The Design of Lock-in Amplifier Based on DSP Builder

Qiang Zheng; Cheng Ma

doi:10.4028/www.scientific.net/AMR.718-720.733

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 718-720The Design of Lock-in Amplifier Based on DSP...

The Design of Lock-in Amplifier Based on DSP Builder

Abstract:

Lock-in amplifier is widely used to detect weak signals from significant background noise. In this paper, an FPGA-based Lock-in amplifier is implemented on the DSP Builder platform to measure impedance between biological cells and electrodes. To improve the measuring accuracy, a narrow band low pass filter with low cut off frequency was implemented. This low pass filter consists of a five-stage cascaded integrator-comb filter, two half band filters and a FIR low pass filter. Simulation shows that with a system clock of 10MHz, the cut off frequency of the low pass filter is lower than 20Hz. Experiments demonstrate that the implemented lock-in amplifier is able to detect weak signal with strong noise, making it an attractive approach to implement lock-in amplifiers which is more flexible and can meet the needs for specified measurements.

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Periodical:

Advanced Materials Research (Volumes 718-720)

Pages:

733-738

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.718-720.733

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Online since:

July 2013

Authors:

Qiang Zheng, Cheng Ma

Keywords:

Lock-In Amplifier, Multi-Rate Signal Processing, Narrow Band Low Pass Filter

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References

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