Accelerating IDCT Algorithm on Xeon Phi Coprocessor

Abstract:

Inverse Discrete Cosine Transform (IDCT) is an important operation for image and videos decompression. How to accelerate the IDCT algorithm has been frequently studied. Recently Intel has proposed Xeon Phi coprocessors based on the many integrated core (MIC) architecture. Xeon Phi is integrated with 61 cores and 512-bit SIMD extension within each core, thus providing very high performance. In this paper, we employ the Knights Corner (a beta version of Xeon Phi) to accelerate the IDCT algorithm. By employing the 512-bit SIMD instruction and data pre-fetching optimization, our implementation achieves (1) averagely 5.82 speedup over the none-SIMD version, (2) averagely 27.3% performance benefit with the data pre-fetching optimization, and (3) averagely 1.53 speedup on one Knights Corner coprocessor over the implementation on one octal-core Intel Xeon E5-2670 CPU.

• Periodical: Advanced Materials Research (Volumes 756-759)
• Pages: 3114-3120
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.756-759.3114
• Online since: September 2013
• Authors: Jin Qi, Can Qun Yang, Cheng Chen, Qiang Wu, Tao Tang
• Keywords: DCT, Pre-Fetching, SIMD, Xeon Phi

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