The Design and Implementation of Reconfigurable Cipher Unit on FPGA

Wei Ping Zhang

doi:10.4028/www.scientific.net/AMR.760-762.339

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 760-762The Design and Implementation of Reconfigurable...

The Design and Implementation of Reconfigurable Cipher Unit on FPGA

Abstract:

Encryption is the core of security technology. The paper managed to design and implement a kind of reconfigurable cipher unit based on the 3DES/AES and optimized by FPGA technology, which can effectively support diverse cryptographic algorithms and can meet the demand on system performance and flexibility. The unit uses hardware description language VHDL, layout and wire on QuartusII8.0. Finally the system is downloaded to DE2 for testing. The design hardware structure is simple, flexibility, security, which can be widely used in the field of information security.

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Periodical:

Advanced Materials Research (Volumes 760-762)

Pages:

339-343

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.760-762.339

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Online since:

September 2013

Authors:

Wei Ping Zhang

Keywords:

3DES/AES, Encryption/Decryption, Field-Programmable Gate Array (FPGA), Reconfigurable

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