Design of Driving Circuit of Area Array CCD with Interline Transfer Based on FPGA

Abstract:

In this paper, FPGA is chosen as the hardware design platform, on the base of sufficient analysis of ICX204AL's working principle and driving timing, the driving timing of CCD is described with Verilog HDL in the development environment of QuartusII 9.0. Finally, Modelsim SE 6.4a is employed to carry on the simulation to verify the accuracy of the design. The result shows that the driving circuit design can meet the demands of ICX204AL, and the CCD can work stably.

• Periodical: Advanced Materials Research (Volumes 860-863)
• Pages: 2365-2368
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.860-863.2365
• Online since: December 2013
• Authors: Zhao Li*, Lei Xu
• Keywords: FPGA, ICX204AL, Interline Transfer Area Array CCD

References

[1] Qingyou Wang: The Application Technology of CCD . edtied by Publishing House of Electronics Industry, Beijing, (2003).

[2] Bogaart E W, Hoekstra W, Peters, I M, et a1: submitted to IEEE the Transactions on Electron Devices(2009).

[3] Chuansheng Zhang: submitted to Chinese Journal of Liquid Crystals and Displays(2012).

[4] Sheng Hu, Lei Yang, Yue Song etc: submitted to Instrument Technique and Sensor(2012).

[5] Shouzheng Li, Bin Tang, Hongshi Ou, etc: submitted to Foreign Electronic Measurement Technology(2012).

[6] Zhimeng Shu, Suhua Chen: submitted to Modern Electronics Technique(2012).