Design of a High-Speed Image Data Real-Time Storage and Display Circuit

Abstract:

The needs of large-capacity storage in high-speed image acquisition systems require the design of reliable and efficient storage instruments. The paper presents a FPGA-based high-speed storage instrument for high speed Camera Link image acquisition system. The FPGA processes the input data and stores the results into the storage array. Multi-chip large-capacity SLC NAND Flash chips constitute a storage array, with up to 100MByte/s storage rate, is used for the digitization image signals. A multilevel high-speed buffer structure based on abundant internal block RAM resources in FPGA is used for speeding up data access. At the same time, it can take advantage of FPGA constructing the corresponding VGA timing signals to control the video conversion chip ADV7123 to realize the function of real-time display. After a description of the proposed hardware and solutions, an experimental was built to test the performance. The results have shown that the FPGA-based acquisition system is a compact and flexible solution for high-speed image acquisition applications.

• Periodical: Advanced Materials Research (Volumes 912-914)
• Pages: 1222-1227
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.912-914.1222
• Online since: April 2014
• Authors: Cheng Qun Chu*, Yong Feng Ren, Fang Ma
• Keywords: Camera Link, Data Storage, FPGA, NAND Flash, VGA

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