FPGA-Based Realization and Simulation of Tail-Biting Convolutional Coding and Decoding in TD-LTE System

Dan Wang; Xiao Peng Dong; Cao Yong Jiang; Nan Lv

doi:10.4028/www.scientific.net/AMR.926-930.1935

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 926-930FPGA-Based Realization and Simulation of...

FPGA-Based Realization and Simulation of Tail-Biting Convolutional Coding and Decoding in TD-LTE System

Abstract:

This paper is based on the FPGA-based realization of tail-biting convolutional coding and decoding in LTE system, including simulation, synthesis and board-level verification on the Virtex-6 chip. Implementation results show that, the encoding and decoding algorithm applied to the TD-LTE RF conformance testing instrument has advantages of high efficiency and good reliability.

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Periodical:

Advanced Materials Research (Volumes 926-930)

Pages:

1935-1938

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.926-930.1935

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Online since:

May 2014

Authors:

Dan Wang, Xiao Peng Dong, Cao Yong Jiang, Nan Lv

Keywords:

Convolutional Coding, Decoding, FPGA Implementation, TD-LTE System, Viterbi

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